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TUSB2E221 bảng dữ liệu(PDF) 50 Page - Texas Instruments |
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TUSB2E221 bảng dữ liệu(HTML) 50 Page - Texas Instruments |
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50 / 65 page ![]() 10 Applications and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 10.1 Application Information The TUSB2E221 can be used in either HOST or Peripheral implementation. The mode is configured by the eUSB2 SoC. 10.2 Typical Application: Dual Port System Repeater APU 1k 1k VDD18 SCL SDA GND RESETB VDD33 VDD18 0.1uF+ 0.1uF+ VDD12 CROSS VSS CROSS EQ0 VDD3V3 SCL SDA EQ2/INT VDD1V8 VIOSEL EQ1 RESETB eDP0 eDN0 eDN1 eDP1 DPA DNA DNB DPB DP DN DP Connector 1 Connector 2 DN VBUS VBUS 10k* 10k* 10k* 10k* *Pullup and Pulldown Resistor Op ons See PHY con gura on + Decoupling capacitors of 0.1uF should be placed less than 2mm from the power supply balls. 10k* 10k* 0.1uF (optional) Figure 10-1. Typical Dual Port System Implementation with 1.8V and I2C 10.2.1 Design Requirements The TUSB2E221 supports the eUSB2 specification. eUSB2 SoC must be compliant to the eUSB2 specification. 10.2.2 Detailed Design Procedure The TUSB2E221 has multiple loss compensation settings for high-speed operation so make sure the selected settings match the system loss profile to optimize jitter performance. USB 2.0 high speed eye diagram measurements can be used as a guide to confirm the loss compensation is optimum for a given system. TUSB2E221 SNLS757B – JUNE 2024 – REVISED NOVEMBER 2024 www.ti.com 50 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: TUSB2E221 |
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