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MCP16502 bảng dữ liệu(PDF) 39 Page - Microchip Technology

tên linh kiện MCP16502
Giải thích chi tiết về linh kiện  High-Performance PMIC for SAMA5DX/SAM9X6/SAM9X7/SAMA7G Series MPUs
PDF  86 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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MCP16502 bảng dữ liệu(HTML) 39 Page - Microchip Technology

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DS20006275D-page 39
MCP16502
REGISTER 4-3:
SYS-TMG: SYSTEM TIMING SETTINGS (0x02)
R/W-0
R/W-1
R/W-0
R/W-1
r-0
R/W-1
R/W-0
R/W-0
PBTO[1:0]
PBINTTO[1:0]
—
RSTDLY[2:0]
bit 7
bit 0
Legend:
r = Reserved bit
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-6
PBTO[1:0]: Push Button Time-out bits
Push button nSTRT time-out delay programming bits, default is ‘01’ (4 seconds).
bit 5-4
PBINTTO[1:0]: Push Button Interrupt Assertion Time-out Delay bits
Push button interrupt assertion time-out delay programming bits, default is ‘01’ (0.5 second).
bit 3
Reserved: Maintain as ‘0’
bit 2-0
RSTDLY[2:0]: nRSTO Deassertion Delay Programming bits
nRSTO deassertion delay programming bits (t4 in the start-up sequence), default is ‘100’ (16 ms).
REGISTER 4-4:
SYS-CFG: SYSTEM CONFIGURATION (0x03)
R/W-1
R/W-1
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
TSDMSK
TWRMSK
HPMPEN
AWKPDIS
FSD[1:0]
B1HCEN
USER
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
TSDMSK: Thermal Shutdown Masking bit
If this bit is ‘1’, it will prevent nINTO from being asserted low upon TSD = 1. Default is ‘1’ (Thermal
Shutdown (TSD) will not be flagged by nINTO).
bit 6
TWRMSK: Thermal Warning Masking bit
If this bit is ‘1’, it will prevent nINTO from being asserted low upon a Thermal Warning event. Default
is ‘1’ (Thermal Warning will not be flagged by nINTO).
bit 5
HPMPEN: High-Performance Mode Enable Pin bit
This bit must be set to ‘1’ through an I2C command in order to enable the HPM pin. If the bit is ‘0’,
setting the HPM pin high will have no effect on the power status state machine.
bit 4
AWKPDIS: Automatic Wake-up Pulse Disable bit
If this bit is set to ‘1’, it disables the generation of a wake-up pulse on pin nSTRTO before an automatic
start-up sequence after a Fault (Thermal Shutdown or hiccup with HCPEN = 0) occurred in Hibernate
mode.
bit 3-2
FSD[1:0]: Switching (Oscillator) Frequency Displacement bits
Default is ‘00’ (no displacement).
bit 1
B1HCEN: Buck1 Hysteretic Control Mode Enable bit
When set, this bit enables the Hysteretic Control mode for Buck1 in Auto-PFM operation.
bit 0
USER: User-Accessible bit
This bit an be used to store system information. It is volatile and is cleared with SVIN UVLO.



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