8 Detailed Description

8.1 Overview

This device contains six independent inverters with open-drain outputs. Each gate performs the Boolean function

Y = A in positive logic.

8.2 Functional Block Diagram

xA

xY

8.3 Feature Description

8.3.1 CMOS Open-Drain Outputs

The open-drain output allows the device to sink current to GND but not to source current from VCC. When the

output is not actively pulling the line low, it will go into a high impedance state. This allows the device to be used

for a wide variety of applications, including up-translation and down-translation, as the output voltage can be

determined by an external pull-up resistor.

The current drive capability of this device creates fast edges into light loads, so routing and load conditions

should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger

currents than the device can sustain without being damaged. It is important for the power output of the device

to be limited to avoid thermal runaway and damage due to over-current. The electrical and thermal limits defined

the in the Absolute Maximum Ratingsmust be followed at all times.

The SN74HC05 can drive a load with a total capacitance less than or equal to the maximum load listed in

the Switching Characteristics - 74 connected to a high-impedance CMOS input while still meeting all of the

datasheet specifications. Larger capacitive loads can be applied, however it is not recommended to exceed the

provided load value. If larger capacitive loads are required, it is recommended to add a series resistor between

the output and the capacitor to limit output current to the values given in the Absolute Maximum Ratings.

8.3.2 Standard CMOS Inputs

Standard CMOS inputs are high impedance and are typically modeled as a resistor from the input to ground

in parallel with the input capacitance given in the Electrical Characteristics - 74. The worst case resistance is

calculated with the maximum input voltage, given in the Absolute Maximum Ratings, and the maximum input

leakage current, given in the Electrical Characteristics - 74, using ohm's law (R = V ÷ I).

Signals applied to the inputs need to have fast edge rates, as defined by the input transition time in the

Recommended Operating Conditions to avoid excessive current consumption and oscillations. If a slow or noisy

input signal is required, a device with a Schmitt-trigger input should be used to condition the input signal prior to

the standard CMOS input.

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SN74HC05, SN54HC05

SCLS080F – MARCH 1984 – REVISED APRIL 2021

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Product Folder Links: SN74HC05 SN54HC05