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PM7367 bảng dữ liệu(PDF) 143 Page - PMC-Sierra, Inc

tên linh kiện PM7367
Giải thích chi tiết về linh kiện  FRAME ENGINE AND DATA LINK MANAGER
PDF  323 Pages
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nhà sản xuất  PMC [PMC-Sierra, Inc]
Trang chủ  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7367 bảng dữ liệu(HTML) 143 Page - PMC-Sierra, Inc

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PM7367 FREEDM-32P32
DATA SHEET
PMC-1991499
ISSUE 2
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE
129
CRC[1:0]:
The CRC algorithm bits (CRC[1:0]) configures the HDLC processor to
perform CRC verification on the incoming data stream. The value of
CRC[1:0] to be written to the channel provision RAM, in an indirect channel
write operation, must be set up in this register before triggering the write.
CRC[1:0] is ignored when DELIN is low. CRC[1:0] reflects the value written
until the completion of a subsequent indirect channel read operation.
Table 16 – CRC[1:0] Settings
CRC[1]
CRC[0]
Operation
0
0
No Verification
0
1
CRC-CCITT
1
0
CRC-32
1
1
Reserved
PROV:
The indirect provision enable bit (PROV) reports the channel provision enable
flag read from the channel provision RAM after an indirect channel read
operation has completed. The provision enable flag to be written to the
channel provision RAM, in an indirect write operation, must be set up in this
register before triggering the write. When PROV is set high, the HDLC
processor will process data on the channel specified by CHAN[4:0]. When
PROV is set low, the HDLC processor will ignore data on the channel
specified by CHAN[4:0]. PROV reflects the value written until the completion
of a subsequent indirect channel read operation.



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