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PM7367 bảng dữ liệu(PDF) 99 Page - PMC-Sierra, Inc |
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PM7367 bảng dữ liệu(HTML) 99 Page - PMC-Sierra, Inc |
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99 / 323 page ![]() PM7367 FREEDM-32P32 DATA SHEET PMC-1991499 ISSUE 2 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE 85 remains valid when interrupts are disabled and may be polled to detect TD free queue error events. IOCE: The transmit interrupt on complete enable bit (IOCE) enables transmission complete interrupts to the PCI host. When IOCE is set high, complete transmission of a packet with the IOC bit in the TD set high will cause an interrupt to be generated on the PCIINTB output. Interrupts are masked when IOCE is set low. However, the IOCI bit remains valid when interrupts are disabled and may be polled to detect transmission of IOC tagged packets. TFUDRE: The transmit FIFO underflow error interrupt enable bit (TFUDRE) enables transmit FIFO underflow error interrupts to the PCI host. When TFUDRE is set high, attempts to read data from the logical FIFO when it is already empty will cause an interrupt to be generated on the PCIINTB output. Interrupts are masked when TFUDRE is set low. However, the TFUDRI bit remains valid when interrupts are disabled and may be polled to detect transmit FIFO underflow events. |
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