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PM7367 bảng dữ liệu(PDF) 105 Page - PMC-Sierra, Inc

tên linh kiện PM7367
Giải thích chi tiết về linh kiện  FRAME ENGINE AND DATA LINK MANAGER
PDF  323 Pages
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nhà sản xuất  PMC [PMC-Sierra, Inc]
Trang chủ  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7367 bảng dữ liệu(HTML) 105 Page - PMC-Sierra, Inc

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PM7367 FREEDM-32P32
DATA SHEET
PMC-1991499
ISSUE 2
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE
91
cleared to begin accumulating events for a new accumulation interval. The bits
in this register are not affected by write accesses.
Note
This register is not byte addressable. Reading this register clears all the activity
bits in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.
SYSCLKA:
The system clock active bit (SYSCLKA) monitors for low to high transitions on
the SYSCLK input. SYSCLKA is set high on a rising edge of SYSCLK, and is
set low when this register is read.
TBDA:
The transmit BERT data active bit (TBDA) monitors for low to high transitions
on the TBD input. TBDA is set high on a rising edge of TDB, and is set low
when this register is read.



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