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PM7366-PI bảng dữ liệu(PDF) 150 Page - PMC-Sierra, Inc |
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PM7366-PI bảng dữ liệu(HTML) 150 Page - PMC-Sierra, Inc |
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150 / 286 page ![]() RELEASED PM7366 FREEDM-8 DATA SHEET PMC-1970930 ISSUE 4 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 137 Register 0x28C : RMAC Packet Descriptor Table Base MSW Bit Type Function Default Bit 31 to Bit 16 Unused XXXXH Bit 15 R/W RPDTB[31] 0 Bit 14 R/W RPDTB[30] 0 Bit 13 R/W RPDTB[29] 0 Bit 12 R/W RPDTB[28] 0 Bit 11 R/W RPDTB[27] 0 Bit 10 R/W RPDTB[26] 0 Bit 9 R/W RPDTB[25] 0 Bit 8 R/W RPDTB[24] 0 Bit 7 R/W RPDTB[23] 0 Bit 6 R/W RPDTB[22] 0 Bit 5 R/W RPDTB[21] 0 Bit 4 R/W RPDTB[20] 0 Bit 3 R/W RPDTB[19] 0 Bit 2 R/W RPDTB[18] 0 Bit 1 R/W RPDTB[17] 0 Bit 0 R/W RPDTB[16] 0 This register provides the more significant word of the Receive Descriptor Table Base address. The contents of the companion RMAC Receive Descriptor Table Base LSW register is held in a holding register until a write access to this register, at which point, the base address of the receive packet descriptor table is updated. Note This register is not byte addressable. Writing to this register modifies all the bits in the register. Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all four byte enables are negated, no access is made to this register. RPDTB[31:0]: The receive packet descriptor table base bits (RPDTB[31:0]) provides the base address of the Receive Packet Descriptor Table in PCI host memory. This register is initialised by the host. |
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