PM7366-PI datasheet(203/286 Pages) PMC

203 / 286 page

RELEASED

PM7366 FREEDM-8

DATA SHEET

PMC-1970930

ISSUE 4

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

190

a channelised E1 link, time-slots 1 to 31 are valid. For unchannelised links, only time-slot 0 is

valid.

LINK[2:0]:

The indirect link number bits (LINK[2:0]) select amongst the 8 transmit links to be configured

or interrogated in the indirect access.

RWB:

The indirect access control bit (RWB) selects between a configure (write) or interrogate (read)

access to the transmit channel provision RAM. The address to the transmit channel provision

RAM is constructed by concatenating the TSLOT[4:0] and LINK[2:0] bits. Writing a logic zero

to RWB triggers an indirect write operation. Data to be written is taken from the PROV and

the CHAN[6:0] bits of the Indirect Data register. Writing a logic one to RWB triggers an

indirect read operation. Addressing of the RAM is the same as in an indirect write operation.

The data read can be found in the PROV and the CHAN[6:0] bits of the Indirect Channel Data

BUSY:

The indirect access status bit (BUSY) reports the progress of an indirect access. BUSY is set

high when this register is written to trigger an indirect access, and will stay high until the

access is complete. At which point, BUSY will be set low. This register should be polled to

determine when data from an indirect read operation is available in the TCAS Indirect

Channel Data register or to determine when a new indirect write operation may commence.

Reserved[1:0]:

The reserved bits (Reserved[1:0]) must be set low for the correct operation of the FREEDM-8

device.

PM7366-PI bảng dữ liệu(PDF) 203 Page - PMC-Sierra, Inc