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PM7366-PI bảng dữ liệu(PDF) 198 Page - PMC-Sierra, Inc |
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PM7366-PI bảng dữ liệu(HTML) 198 Page - PMC-Sierra, Inc |
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198 / 286 page ![]() RELEASED PM7366 FREEDM-8 DATA SHEET PMC-1970930 ISSUE 4 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 185 Register 0x3A4 : THDL Indirect Block Data Bit Type Function Default Bit 31 to Bit 16 Unused XXXXH Bit 15 R/W Reserved 0 Bit 14 Unused X Bit 13 Unused X Bit 12 Unused X Bit 11 Unused X Bit 10 Unused X Bit 9 Unused X Bit 8 R/W BPTR[8] 0 Bit 7 R/W BPTR[7] 0 Bit 6 R/W BPTR[6] 0 Bit 5 R/W BPTR[5] 0 Bit 4 R/W BPTR[4] 0 Bit 3 R/W BPTR[3] 0 Bit 2 R/W BPTR[2] 0 Bit 1 R/W BPTR[1] 0 Bit 0 R/W BPTR[0] 0 This register contains data read from the transmit block pointer RAM after an indirect block read operation or data to be inserted into the transmit block pointer RAM in an indirect block write operation. Note This register is not byte addressable. Writing to this register modifies all the bits in the register. Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all four byte enables are negated, no access is made to this register. BPTR[8:0]: The indirect block pointer (BPTR[8:0]) configures the block pointer of the block specified by the Indirect Block Select register. The block pointer to be written to the transmit block pointer RAM, in an indirect write operation, must be set up in this register before triggering the write. |
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