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STAC9250 bảng dữ liệu(PDF) 33 Page - Integrated Device Technology

tên linh kiện STAC9250
Giải thích chi tiết về linh kiện  TWO-CHANNEL HD AUDIO CODEC WITH MODEM & DUAL DIGITAL MICROPHONE INTERFACES
PDF  137 Pages
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nhà sản xuất  IDT [Integrated Device Technology]
Trang chủ  http://www.idt.com
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STAC9250 bảng dữ liệu(HTML) 33 Page - Integrated Device Technology

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STAC9250/9251
TWO-CHANNEL HD AUDIO CODEC WITH MODEM & DUAL DIGITAL MICROPHONE INTERFACES
PC AUDIO
IDT™
33
STAC9250/9251
V 1.1 102706
TWO-CHANNEL HD AUDIO CODEC WITH MODEM & DUAL DIGITAL MICROPHONE INTERFACES
5.5.13.
AFG GPIOEn
[1]
Data1
RW
0x0
Data for GPIO1 (Pin 34). If this GPIO bit is
configured as Sticky (edge-sensitive) input,
it can be cleared by writing zero (one) here
when the corresponding Polarity Control bit
is zero (one).
[0]
Data0
RW
0x0
Data for GPIO0 (Pin 33). If this GPIO bit is
configured as Sticky (edge-sensitive) input,
it can be cleared by writing zero (one) here
when the corresponding Polarity Control bit
is zero (one).
Table 34. AFG GPIOEn Command Verb Format
Verb ID
Payload
Response
Get
F16
00
See bitfield table
Set1
716
See bits [7:0] of bitfield table
0000_0000h
Table 35. AFG GPIOEn Command Response Format
Bit
Bitfield Name
RW
Reset
Description
[31:4]
Rsvd
R
0x0
Reserved
[3]
Mask3
RW
0x0
Enable for GPIO3:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
[2]
Mask2
RW
0x0
Enable for GPIO2:
0 = pin is disabled (Hi-Z state);
1 = pin is enabled; behavior determined by
GPIO Direction control
Table 33. AFG GPIO Command Response Format
Bit
Bitfield Name
RW
Reset
Description



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