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SSM2602CPZ-R21 bảng dữ liệu(PDF) 22 Page - Analog Devices

tên linh kiện SSM2602CPZ-R21
Giải thích chi tiết về linh kiện  Low Power Audio Codec
PDF  28 Pages
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SSM2602CPZ-R21 bảng dữ liệu(HTML) 22 Page - Analog Devices

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SSM2602
Preliminary Technical Data
Rev. PrB | Page 22 of 28
POWER MANAGEMENT, ADDRESS 0x06
Table 23. Power Management Register Bit Map
D8
D7
D6
D5
D4
D3
D2
D1
D0
0
PWROFF
CLKOUTPD
OSCPD
OUTPD
DACPD
ADCPD
MICPD
LINEINPD
Table 24.
Bit Name
Description
Settings
PWROFF
Whole chip power-down control
0 = power up
1 = power down (default)
CLKOUTPD
Clock output power-down control
0 = power up (default)
1 = power down
OSCPD
Crystal power-down control
0 = power up (default)
1 = power down
OUTPD
Output power-down control
0 = power up
1 = power down (default)
DACPD
DAC power-down control
0 = power up
1 = power down (default)
ADCPD
ADC power-down control
0 = power up
1 = power down (default)
MICPD
Microphone input power-down control
0 = power up
1 = power down (default)
LINEINPD
Line input power-down control
0 = power up
1 = power down (default)
POWER CONSUMPTION
Table 25.
Mode
PWROFF
CLKOUTPD
OSCPD
OUTPD
DACPD
ADCPD
MICPD
LINEINPD
AVDD
(3.3 V)
HPVDD
(3.3 V)
DCVDD
(1.5 V)
DBVDD
(1.5 V)
Unit
Record and
Playback
0
0
0
0
0
0
0
0
8.36
1.7
TBD
TBD
mA
Playback Only
Oscillator
Enabled
0
0
0
0
0
1
1
1
3.1
1.7
TBD
TBD
mA
External Clock
0
1
1
0
0
1
1
1
3.1
1.7
TBD
TBD
mA
Record Only
Line Clock
0
0
0
1
1
0
1
0
3.15
-
TBD
TBD
mA
Line Oscillator
0
0
1
1
1
0
1
0
3.15
-
TBD
TBD
mA
Microphone 1
0
0
0
1
1
0
0
1
3.45
-
TBD
TBD
mA
Microphone 2
0
0
1
1
1
0
0
1
3.45
TBD
TBD
mA
Sidetone
(Microphone to
Headphone
Output)
External Clock
0
0
1
0
1
1
0
1
2.24
1.7
TBD
TBD
mA
Internally
Generated
Clock
0
0
1
0
1
1
0
1
2.24
1.7
TBD
TBD
mA
Analog Bypass
(Line Input or
Line Output)
External Line
0
0
1
0
1
1
1
0
1.94
1.7
TBD
TBD
mA
Internally
Generated
Line
0
0
1
0
1
1
1
0
1.94
1.7
TBD
TBD
mA
Power-Down
External Clock
1
1
1
1
1
1
1
1
TBD
TBD
TBD
TBD
mA
Oscillator
1
1
1
1
1
1
1
1
TBD
TBD
TBD
TBD
mA



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