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CS42428 bảng dữ liệu(PDF) 18 Page - Cirrus Logic

tên linh kiện CS42428
Giải thích chi tiết về linh kiện  114 dB, 192 kHz 8-Ch Codec with PLL
PDF  73 Pages
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS42428 bảng dữ liệu(HTML) 18 Page - Cirrus Logic

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18
DS605F1
CS42428
3. TYPICAL CONNECTION DIAGRAMS
VLS
VD
AOUTA1+
24
0.1 µF
+
10 µF
100 µF
0.1 µF
+
+
17
18
VQ
FILT+
36
37
0.1 µF
4.7 µF
VA
+
10 µF
0.1 µF
51
53
AOUTA1-
AOUTB1+
35
34
AOUTB1-
AOUTA2+
32
33
AOUTA2-
AOUTB2+
31
30
AOUTB2-
AOUTA3+
28
29
AOUTA3-
AOUTB3+
27
26
AOUTB3-
AOUTA4+
22
23
AOUTA4-
AOUTB4+
21
20
AOUTB4-
MUTEC
38
25
DGND DGND
5
VLC
0.1 µF
+1.8 V
to +5 V
6
3
60
59
62
1
64
61
2
63
8
7
SCL/CCLK
SDA/CDOUT
AD1/CDIN
RST
12
9
OMCK
ADC_LRCK
REFGND
19
AD0/CS
10
INT
11
Digital Audio
Processor
Micro-
Controller
55
RMCK
58
ADCIN1
57
ADCIN2
CS5361
A/D Converter
CS5361
A/D Converter
56
ADC_SDOUT
48
46
44
45
47
43
41
4
VA
VD
0.1 µF
AGND
AGND
52
40
LPFLT
39
AINL+
AINL-
AINR+
AINR-
15
16
14
13
42
Connect DGND and AGND at single point near Codec
GPO1
GPO2
GPO3
GPO4
GPO5
GPO6
GPO7
DAC_SDIN1
ADC_SCLK
DAC_SDIN3
DAC_SDIN2
DAC_SDIN4
DAC_LRCK
DAC_SCLK
0.01 µF
0.1 µF
+
10 µF
+5 V
0.01 µF
0.01 µF
+3.3 V to +5 V
+
10 µF
0.1 µF
0.01 µF
+3.3 V
to +5.0 V
S/PDIF
CS8416
Receiver
RMCK
OSC
Optional
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Analog Output Buffer 2
and
Mute Circuit (optional)
Mute
Drive
(optional)
+VA
*
* Pull up or down as
required on startup if the
Mute Control is used.
*
2700 pF*
2700 pF*
Left Analog Input
Right Analog Input
Analog
Input
Buffer 1
Analog
Input
Buffer 1
CFILT 3
RFILT 3
CRIP 3
2 k
Ω
2 k
Ω
**
**
** Resistors are required for
I2C control port operation
1. See the ADC Input Filter section in the Appendix.
2. See the DAC Output Filter section in the Appendix.
3. See the PLL Filter section in the Appendix.
Figure 5. Typical Connection Diagram
CS42428



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