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ADL9005ACPZN-R7 bảng dữ liệu(PDF) 23 Page - Analog Devices |
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ADL9005ACPZN-R7 bảng dữ liệu(HTML) 23 Page - Analog Devices |
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23 / 24 page ![]() Data Sheet ADL9005 APPLICATIONS INFORMATION analog.com Rev. A | 23 of 24 PROVIDING DRAIN BIAS THROUGH THE ACG4/VDD2 PIN An alternative way to bias the ADL9005 is through the ACG4/VDD2 pin (Pin 24), which is shown in Figure 78. Because of the voltage drop across the internal bias resistor, a higher VDD is required. If a 300 Ω bias resistor (R1) is used and connected to the 5 V power supply, which results in a total current of 80 mA, a VDD of 8.5 V is recommended. R1 can also be connected to the VDD of 8.5 V. In this case, to set IDQ to 80 mA, use an R1 value of 850 Ω on RBIAS. The performance of this circuit is summarized in Figure 67 to Figure 72. Figure 78. Providing Resistive Drain Bias Through the ACG4/VDD2 Pin POWER-UP AND POWER-DOWN SEQUENCING Apply the RF input signal after the main supply voltage and the voltage driving RBIAS (R1 in Figure 74 and Figure 78) and remove the RF input signal before the main supply voltage and the voltage on RBIAS are turned off. The voltage on RBIAS can either be applied simultaneously with VDD or after VDD is applied. |
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