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MP86950GLVT bảng dữ liệu(PDF) 3 Page - Monolithic Power Systems |
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MP86950GLVT bảng dữ liệu(HTML) 3 Page - Monolithic Power Systems |
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3 / 15 page ![]() MP86950 – INTELLI-PHASETM SOLUTION W/ INTEGRATED MOSFETS AND DRIVERS MP86950 Rev. 1.0 www.MonolithicPower.com 3 12/18/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1 TMON/FLT Single-pin temperature sense and fault reporting. 2, 23 AGND Analog ground. 3 VDD Supply voltage (3.3V) for the internal circuitry. Decouple VDD using a 1µF or greater ceramic capacitor connected to AGND. 4 VDRV Driver voltage. Connect the VDRV pin to the 3.3V supply. Decouple VDRV with a 1μF to 4.7μF ceramic capacitor. 5, 24, 27 NC No connection. 6, 7, 13, 14, 15, 26 PGND Power ground. 8, 9, 10, 11, 12 SW Switch output. 16, 17, 18 VIN Supply voltage. Place a ceramic input capacitor (CIN) close to the device to support the switching current and minimize parasitic inductance. 19 PHASE Switching node for the bootstrap capacitor connection. The PHASE pin is connected to the SW pin internally. 20 BST Bootstrap. The BST pin requires a 0.1µF to 1µF capacitor to drive the power switch’s gate above the supply voltage. Connect BST to the capacitor between PHASE and BST to form a floating supply across the switch driver. 21 PWM Pulse-width modulation input. Float the PWM pin or drive PWM to a middle state to enable diode emulation mode. 22 EN Enable. Pull the EN pin low to disable the device and put SW in a high-impedance state. 25 CS Current-sense output. The CS pin has a bi-directional current output proportional to the inductor current. Connect this pin to the PWM controller ’s current sense input. Connect a resistor to a common mode voltage, so that the differential voltage is proportional to the inductor current. |
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