UBA1707TS datasheet(10/36 Pages) PHILIPS

10 / 36 page

1999 Feb 17

Philips Semiconductors

Product speciﬁcation

Cordless telephone, answering machine

line interface

UBA1707

The UBA1707 offers the possibility to choose two kinds of

regulations for the DC characteristic between the line

terminals LN+ and LN

− (see Fig.7):

• Voltage regulation mode

• Current regulation mode.

The regulation mode is selected by the bit CRC via the

serial interface.

The DC mask regulation is realised by adjusting the DC

voltage VCE (TNSW) between pin GND and line terminal

− as a function of the line current.

Voltage regulation mode

In voltage regulation mode (bit CRC at logic 0),

VCE (TNSW) voltage is fixed by means of a 200 nA DC

constant current ILVIV flowing through RLVI.

Fig.7

General form of the DC mask as a function

of regulation mode.

(1) Low voltage area.

(2) Small slope (determined by RSLPE).

(3) Small slope (dashed line; determined by RSLPE) in voltage

regulation mode.

High slope (full line; determined by RSLPE, RLVI and RRGL) in

current regulation mode.

(4) Current limitation.

handbook, halfpage

MGK710

Vline

Iline

Iprot

(4)

Iknee

Ilow

(1)

(2)

(3)

Therefore VCE (TNSW) ≅ RLVI × ILVIV = 200 mV in typical

application (see Fig.18).

The slope

∆Vline/∆Iline of the Vline, Iline characteristic is

RREGV ≅ RSLPE.

Current regulation mode

In current regulation mode (bit CRC at logic 1), when the

line current is lower than Iknee = 35 mA (with

ZSET = 619 Ω), VCE (TNSW) is fixed by means of a 200 nA

DC constant current ILVIV flowing through RLVI. When the

line current is higher than 35 mA, an additional current

(proportional to the line current) flows through RLVI. As a

result, TNSW works as a DC voltage source increasing with

the line current. VCE (TNSW) can be calculated as follows:

Where:

Iline = line current

RRGL = resistor connected at pin RGL.

The slope

∆Vline/∆Iline of the Vline, Iline characteristic is

determined by the ratio of resistors connected at

pins SLPE, LVI and RGL, and can be calculated as

follows:

typical application (see Fig.18).

Current limitation

Whatever the selected mode is, the line current is limited

to approximately 145 mA. This current is sensed on SLPE,

for this purpose the external zener diode must be

connected between pins LN and SLPE. The speech

function no longer operates in this condition.

ELECTRONIC HOOK SWITCH CONTROL (PIN EHI)

The electronic hook switch input (EHI) controls the state of

TPDARL transistor. When the voltage applied at pin EHI is

LOW, TPDARL transistor is turned off. Voltage at pin LCC is

pulled up to supply voltage (VCC). TNSW and TNON-HOOK

transistors are also turned off by means of a pull-down

resistor (RPLD). When the voltage applied at pin EHI is

HIGH, TPDARL transistor is driven by the operational

amplifier at pin LCC and the regulation mode selected is

operating. An internal 165 k

Ω pull-up resistor is connected

between pins LCC and VCC.

CE TNSW

() R

LVI

SLPE

RGL

----------------

line

knee

–

() I

LVIV







≅

REGC

SLPE

LVI

SLPE

RGL

----------------

1400

Ω

≅

UBA1707TS bảng dữ liệu(PDF) 10 Page - NXP Semiconductors

UBA1707TS bảng dữ liệu(HTML) 10 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36

bảng dữ liệu tải về

Link URL