Datasheet

4

002-34202 Rev. *B

2023-11-06

16-Mb Static RAM with ECC and RADSTOP™ technology

2M × 8

Functional description

1

Functional description

The CYRS1069G is a high-performance complementary metal oxide semiconductor (CMOS) static RAM organized

as 2M words by 8 bits with RADSTOP™ technology. Infineon state-of-the-art RADSTOP™ technology is radiation

hardened through proprietary design and process hardening techniques. The 16-Mbit fast asynchronous SRAM

with RADSTOP technology is also QML V certified with Defense Logistics Agency Land and Maritime (DLAM).

To write to the device, take Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0

through I/O7) is then written into the location specified on the address pins (A0 through A18).

To read from the device, take Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE)

HIGH. Under these conditions, the contents of the memory location specified by the address pins appear on the

I/O pins. See the “Truth table” on page 18 for a complete description of read and write modes.

The eight input or output pins (I/O0 through I/O7) are placed in a high impedance state when the device is

deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE LOW, and WE LOW)

The CYRS1069G is available in a ceramic 36-pin flat package with center power and ground (revolutionary)

pinout.

For best practice recommendations, refer to the application note AN1064, SRAM system guidelines.