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PIC18F258-E/SOSQTP bảng dữ liệu(PDF) 93 Page - Microchip Technology

tên linh kiện PIC18F258-E/SOSQTP
Giải thích chi tiết về linh kiện  28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
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PIC18F258-E/SOSQTP bảng dữ liệu(HTML) 93 Page - Microchip Technology

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© 2006 Microchip Technology Inc.
DS41159E-page 91
PIC18FXX8
8.5
RCON Register
The Reset Control (RCON) register contains the IPEN
bit which is used to enable prioritized interrupts. The
functions of the other bits in this register are discussed
in more detail in Section 4.14 “RCON Register”.
REGISTER 8-13:
RCON: RESET CONTROL REGISTER
R/W-0
U-0
U-0
R/W-1
R-1
R-1
R/W-0
R/W-0
IPEN
—
—RI
TO
PD
POR
BOR
bit 7
bit 0
bit 7
IPEN: Interrupt Priority Enable bit
1
= Enable priority levels on interrupts
0
= Disable priority levels on interrupts (PIC16CXXX Compatibility mode)
bit 6-5
Unimplemented: Read as ‘0’
bit 4
RI: RESET Instruction Flag bit
For details of bit operation, see Register 4-3.
bit 3
TO: Watchdog Time-out Flag bit
For details of bit operation, see Register 4-3.
bit 2
PD: Power-down Detection Flag bit
For details of bit operation, see Register 4-3.
bit 1
POR: Power-on Reset Status bit
For details of bit operation, see Register 4-3.
bit 0
BOR: Brown-out Reset Status bit
For details of bit operation, see Register 4-3.
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown



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