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PIC16F685-E/ML bảng dữ liệu(PDF) 11 Page - Microchip Technology |
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PIC16F685-E/ML bảng dữ liệu(HTML) 11 Page - Microchip Technology |
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11 / 294 page  © 2007 Microchip Technology Inc. DS41262D-page 9 PIC16F631/677/685/687/689/690 1.0 DEVICE OVERVIEW The PIC16F631/677/685/687/689/690 devices are covered by this data sheet. They are available in 20-pin PDIP, SOIC, TSSOP and QFN packages. Block Diagrams and pinout descriptions of the devices are as follows: • PIC16F631 (Figure 1-1, Table 1-1) • PIC16F677 (Figure 1-2, Table 1-2) • PIC16F685 (Figure 1-3, Table 1-3) • PIC16F687/PIC16F689 (Figure 1-4, Table 1-4) • PIC16F690 (Figure 1-5, Table 1-5) FIGURE 1-1: PIC16F631 BLOCK DIAGRAM Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer Brown-out Reset Flash Program Memory 13 Data Bus 8 14 Program Bus Instruction Reg Program Counter RAM File Registers Direct Addr 7 RAM Addr 9 Addr MUX Indirect Addr FSR Reg STATUS Reg MUX ALU W Reg Instruction Decode and Control Timing Generation OSC1/CLKI OSC2/CLKO 8 8 8 3 8-Level Stack (13-bit) 64 bytes 1K x 14 VDD INT Configuration Internal Oscillator MCLR Block VSS 2 Timer0 Timer1 Analog Comparators C1IN- C1IN+ C1OUT and Reference 8 C2IN- C2IN+ C2OUT T1G T1CKI T0CKI Data EEPROM 128 Bytes EEDAT EEADR RB4 RB5 RB6 RB7 PORTA RA0 RA1 RA2 RA3 RA4 RA5 PORTC RC0 RC1 RC2 RC3 RC4 RC5 RC6 RC7 PORTB Ultra Low-Power Wake-up ULPWU |
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