PIC18F85J90 datasheet(56/411 Pages) MICROCHIP

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PIC18F85J90 FAMILY

DS39770B-page 54

Preliminary

IPR3

PIC18F6XJ90 PIC18F8XJ90

-111 -11-

-uuu -uu-

PIR3

PIC18F6XJ90 PIC18F8XJ90

-000 -00-

-uuu -00-(3)

PIE3

PIC18F6XJ90 PIC18F8XJ90

-000 -00-

-uuu -00-

IPR2

PIC18F6XJ90 PIC18F8XJ90

11-- 111-

uu-- uuu-

PIR2

PIC18F6XJ90 PIC18F8XJ90

00-- 000-

uu-- uuu-(3)

PIE2

PIC18F6XJ90 PIC18F8XJ90

00-- 000-

uu-- uuu-

IPR1

PIC18F6XJ90 PIC18F8XJ90

-111 1-11

-uuu u-uu

PIR1

PIC18F6XJ90 PIC18F8XJ90

-000 0-00

-uuu u-uu(3)

PIE1

PIC18F6XJ90 PIC18F8XJ90

-000 0-00

-uuu u-uu

OSCTUNE

PIC18F6XJ90 PIC18F8XJ90

0000 0000

uuuu uuuu

TRISJ

PIC18F6XJ90 PIC18F8XJ90

1111 1111

uuuu uuuu

TRISH

PIC18F6XJ90 PIC18F8XJ90

1111 1111

uuuu uuuu

TRISG

PIC18F6XJ90 PIC18F8XJ90

0001 1111

uuuu uuuu

TRISF

PIC18F6XJ90 PIC18F8XJ90

1111 111-

uuuu uuu-

TRISE

PIC18F6XJ90 PIC18F8XJ90

1111 1-11

uuuu u-uu

TRISD

PIC18F6XJ90 PIC18F8XJ90

1111 1111

uuuu uuuu

TRISC

PIC18F6XJ90 PIC18F8XJ90

1111 1111

uuuu uuuu

TRISB

PIC18F6XJ90 PIC18F8XJ90

1111 1111

uuuu uuuu

TRISA(5)

PIC18F6XJ90 PIC18F8XJ90

1111 1111(5)

uuuu uuuu(5)

LATJ

PIC18F6XJ90 PIC18F8XJ90

xxxx xxxx

uuuu uuuu

LATH

PIC18F6XJ90 PIC18F8XJ90

xxxx xxxx

uuuu uuuu

LATG

PIC18F6XJ90 PIC18F8XJ90

00-x xxxx

00-u uuuu

uu-u uuuu

LATF

PIC18F6XJ90 PIC18F8XJ90

xxxx xxx-

uuuu uuu-

LATE

PIC18F6XJ90 PIC18F8XJ90

xxxx xxxx

uuuu uuuu

LATD

PIC18F6XJ90 PIC18F8XJ90

xxxx xxxx

uuuu uuuu

LATC

PIC18F6XJ90 PIC18F8XJ90

xxxx xxxx

uuuu uuuu

LATB

PIC18F6XJ90 PIC18F8XJ90

xxxx xxxx

uuuu uuuu

LATA(5)

PIC18F6XJ90 PIC18F8XJ90

xxxx xxxx(5)

uuuu uuuu(5)

PORTJ

PIC18F6XJ90 PIC18F8XJ90

xxxx xxxx

uuuu uuuu

PORTH

PIC18F6XJ90 PIC18F8XJ90

xxxx xxxx

uuuu uuuu

PORTG

PIC18F6XJ90 PIC18F8XJ90

000x xxxx

000u uuuu

PORTF

PIC18F6XJ90 PIC18F8XJ90

xxxx xxx-

uuuu uuu-

TABLE 4-2:

INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)

Applicable Devices

Power-on Reset,

Brown-out Reset

MCLR Resets

WDT Reset

RESET

Instruction

Stack Resets

Wake-up via WDT

or Interrupt

Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ‘0’, q = value depends on condition.

Shaded cells indicate conditions do not apply for the designated device.

Note 1:

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are

updated with the current value of the PC. The STKPTR is modified to point to the next location in the

hardware stack.

When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt

vector (0008h or 0018h).

One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).

See Table 4-1 for Reset value for specific condition.

Bits 6 and 7 of PORTA, LATA and TRISA are enabled depending on the oscillator mode selected. When

not enabled as PORTA pins, they are disabled and read as ‘0’.

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