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TDA9873HS bảng dữ liệu(PDF) 7 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  Multistandard dual carrier stereo sound decoder
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TDA9873HS bảng dữ liệu(HTML) 7 Page - NXP Semiconductors

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2000 Apr 04
7
Philips Semiconductors
Product specification
Multistandard dual carrier stereo sound decoder
TDA9873H
FUNCTIONAL DESCRIPTION
FM demodulators
The FM demodulators are Narrow-Band Phase-Locked
Loops (NBPLLs) with external loop filters, to provide the
required selectivity. To achieve good selectivity, linear
Phase Detectors (PDs) and constant input levels are
required. The intercarrier signal from the input terminal is
fed via high-pass filters and gain controlled amplifiers to
the phase detectors. A carrier cancellation circuit placed
before the amplifier for the second PLL is used to reduce
the first sound carrier. The PD output signals control the
integrated relaxation oscillators via the loop filters.
The frequency range is approximately 4 to 7 MHz. As a
result of locking, the oscillator frequency tracks with the
modulation of the input signal and the oscillator control
voltages are superimposed by the AF voltages. Using this
method, the FM-PLLs operate as FM demodulators.
The AF voltages are present at the loop filters and fed via
buffers with 0 dB gain to the audio amplifiers.
The supported standards and their characteristics are
given in Table 1.
Digital acquisition help
A narrow-band PLL requires a measure to lock to the
wanted input signal. Each relaxation oscillator of the three
integrated PLLs (first and second sound carriers and pilot
carrier) has a wide frequency range. To guarantee correct
locking of the PLL with respect to the catching range, the
digital acquisition help provides individual control until the
VCO frequency is within the standard and PLL dependent
lock-in window, related to the standard dependent carriers.
It ensures that the oscillator frequency of the FM-PLL is
within
±225 kHz of the sound carrier to be demodulated.
The pilot carrier frequency window is
±150 Hz.
The working principal of the digital acquisition help is as
follows. The VCOs are connected, one at a time, to a
down-counter. The counter start value is standard
dependent and predefined for each of the three PLLs.
After a given counting time the stop value of the
down-counter is probed.
If the stop value is lower (higher) than the expected value
range, the VCO frequency is higher (lower) than the lock-in
window. A negative (positive) control current is injected
into the loop filter for a short time, thereby decreasing
(increasing) the VCO frequency by a proportional value.
If the stop value meets the expected value range, the VCO
frequency is within the defined lock-in window and no
control current is injected into the loop filter.
In an endless circle the VCO of the next PLL will be
connected to the down-counter and the described
procedure starts again.
The whole tracing as well as the counting time itself is
derived from the external frequency reference. The cycle
time is 256
µs.
Auto mute
If a sound carrier is missed, acquisition pulses are
generated when the NBPLL frequency leaves the window
edges. To avoid noise at the audio output, an I2C-bus
switchable mute-enable stage is built in. If auto mute is
enabled via the I2C-bus, the circuit mutes immediately
after the first acquisition pulse. If a sound carrier occurs
(no further acquisition pulses), the mute stage
automatically returns to active mode after 40 ms.
If the first sound carrier is not present, the second audio
channel will also be muted.
Audio preamplifier
The AF preamplifiers are operational amplifiers with
internal feedback, high gain and high common mode
rejection. The AF voltages from the PLL demodulators
(small output signals) are amplified by approximately
34 dB. Using a DC operating point control circuit, the
AF amplifiers are decoupled from the PLL DC voltage.
The amplified AF signals are available at the output
terminals and fed via external decoupling capacitors to the
stereo decoder input terminals.
Stereo decoder
The input circuit incorporates a soft-mute stage which is
controlled by the FM-PLL acquisition circuit. The auto
mute function can be disabled via the I2C-bus.
The AF output voltage is 500 mV (RMS) for 54%
modulation, clipping therefore may occur at high
over-modulation. If more headroom is required the input
signal can be attenuated by 6 dB via the I2C-bus.
A stereo adjustment (see Fig.6) is incorporated to correct
the FM demodulator output voltage spread (see Table 19).
If no I2C-bus adjustment is required (potentiometer
adjustment or no adjustment) the default value should be
0 dB for B/G, M and D/K (2) standard. For the standards
D/K (1) and D/K (3) the second sound carrier frequency is
below the first sound carrier which results in a lower
AF output level for the second sound carrier. In this state,
a gain of +0.1 dB for D/K (1) and +0.2 dB for D/K (3) is
preferred.



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