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TDA9725 bảng dữ liệu(PDF) 13 Page - NXP Semiconductors

tên linh kiện TDA9725
Giải thích chi tiết về linh kiện  Y/C automatic adjustment processor VHS standard
PDF  44 Pages
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nhà sản xuất  PHILIPS [NXP Semiconductors]
Trang chủ  http://www.nxp.com
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TDA9725 bảng dữ liệu(HTML) 13 Page - NXP Semiconductors

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1996 Oct 14
13
Philips Semiconductors
Product specification
Y/C automatic adjustment processor
(VHS standard)
TDA9725
Burst gate pulse output (or sandcastle output; pin 18); note 5
tBGP
burst gate pulse duration
4.2
4.45
4.7
µs
tBGS
start of burst gate beyond
sync start at pin 45
3.25
3.5
3.75
µs
VO(L)
LOW level DC output
voltage
inactive; I18 =1mA
−−
0.7
V
inactive; I18 =0mA
−−
0.5
V
VO(M)
medium level DC output
voltage
horizontal blanking;
10 k
Ω connected to VCC
2.2
2.6
3.0
V
VO(H)
HIGH level DC output
voltage
BGP; I18 = −0.4 mA
4.0
4.4
−
V
BGP; I18 =0mA
4.6
−−
V
tVBL(start)
vertical blanking of BGP
start
referring to first equalisation
pulse in mid of line
−
0
−
tH
tVBL(stop)
vertical blanking of BGP
stop
referring to rotary transition
23
−−
tH
referring to last equalisation pulse
in mid of line
1
−−
tH
Rotary pulse input (pin 19; open PNP base)
VC2
voltage for
−90° phase
rotation
channel 2
0
−
2.25
V
VC1
voltage for non-rotation
(PAL) or +90
° rotation
(NTSC)
channel 1
2.75
−
5V
Loop filter VXO (pin 20; record mode)
V20
DC voltage
1
2.4
3.6
V
ΦVXO
VXO sensitivity
−1.6
−1.2
−0.8
Hz/mV
fPI(U)
upper pull-in frequency
0.6
1.0
1.8
kHz
fPI(L)
lower pull-in frequency
−1.8
−1.0
−0.6
kHz
Loop filter VCO (pin 21)
V21
DC voltage
1.3
2.1
2.9
V
ΦVCO
VCO sensitivity
fH related; record mode
−34
−38
−42
kHz/V
fsc related; playback mode
−1.3
−1.5
−1.7
MHz/V
fsc output (pin 23)
V23
DC output voltage
1.8
2.3
2.8
V
Vo(p-p)
output signal voltage
(peak-to-peak value)
no load
500
600
700
mV
H2
second harmonic distortion
−−−25
dB
H3
third harmonic distortion
−−−20
dB
VXO input from crystal (pin 24); note 6
V24
DC voltage
2.6
3.0
3.4
V
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT



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