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25LC1024T-E/MF bảng dữ liệu(PDF) 15 Page - Microchip Technology

tên linh kiện 25LC1024T-E/MF
Giải thích chi tiết về linh kiện  1 Mbit SPI Bus Serial EEPROM
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nhà sản xuất  MICROCHIP [Microchip Technology]
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25LC1024T-E/MF bảng dữ liệu(HTML) 15 Page - Microchip Technology

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© 2007 Microchip Technology Inc.
Preliminary
DS21836D-page 15
25AA1024/25LC1024
2.9
SECTOR ERASE
The Sector Erase function will erase all bits (FFh)
inside the given sector. A Write Enable (WREN) instruc-
tion must be given prior to attempting a Sector Erase.
This is done by setting CS low and then clocking out
the proper instruction into the 25XX1024. After all
eight bits of the instruction are transmitted, the CS
must be brought high to set the write enable latch.
The Sector Erase function is entered by driving CS
low, followed by the instruction code (Figure 2-9), and
three address bytes. Any address inside the sector to
be erased is a valid address.
CS must then be driven high after the last bit if the
address or the Sector Erase will not execute. Once the
CS is driven high, the self-timed Sector Erase cycle is
started. The WIP bit in the STATUS register can be
read to determine when the Sector Erase cycle is
complete.
If a SECTOR ERASE instruction is given to an address
that has been protected by the Block Protect bits (BP0,
BP1) then the sequence will be aborted and no erase
will occur.
See Table 2-3 for Sector Addressing.
FIGURE 2-9:
SECTOR ERASE SEQUENCE
SO
SI
SCK
CS
0
23456789 10 11
29 30 31
1
00
1
1
0
1
10
23 22 21 20
210
Instruction
24-bit Address
High-Impedance



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