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DSPIC33FJ256GP710 bảng dữ liệu(PDF) 4 Page - Microchip Technology

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DS80279B-page 4
© 2006 Microchip Technology Inc.
3.
Module: 10-bit ADC
When the ADC module is configured for 10-bit
operation, the specifications in the data sheet are
not met for operation above 500 Ksps.
For 500 Ksps, the module meets specifications
except for Gain and Offset parameters AD23bb
and AD24bb.
For 600 Ksps operation, the module specifications
are shown in Table 2.
Work around
None. Future versions of the silicon will support
the ADC performance stated in the data sheet.
TABLE 2:
600 KSPS OPERATION
4.
Module: DMA Module: Interaction with
EXCH
Instruction
The EXCH instruction does not execute correctly
when either of the two operands is numerically
equal to the address of any of the DMAC SFRs for
this revision of silicon.
Work around
If writing source code in assembly, the
recommended fix is to replace:
EXCH Wsource, Wdestination
with:
PUSH Wdestination
MOV Wsource, Wdestination
POP Wsource
If using the MPLAB C30 C compiler, check the dis-
assembly listing (View>Disassembly Listing) for
the EXCH instruction. If used, make sure the oper-
ands are not equivalent to the DMA SFRs’
addresses.
Param No.
Symbol
Min
Typ
Max
Units
Conditions
AD17
RIN
—
—
200
Ohm
10-bit
ADC Accuracy – Measurements taken with External VREF+/VREF-
AD20b
Nr
—
10 bits
—
Bits
AD21b
INL
-2
—
2
LSB
AD22b
DNL
-1.5
—
2
LSB
AD23b
GERR
1
3
6
LSB
AD24b
EOFF
1
2
5
LSB
ADC Accuracy – Measurements taken with Internal VREF+/VREF-
AD21bb
INL
-2
—
2
LSB
AD22bb
DNL
-1.5
—
2
LSB
AD23bb
GERR
1
6
12
LSB
AD24bb
EOFF
2
5
10
LSB
Dynamic Performance
AD33b
FNYQ
—
—
300
KHz
AD34b
ENOB
8.5
9.7
9.8
Bits
ADC Conversion Rate
AD56b
FCNV
—
—
600
Ksps
AD57b
TSAMP
—
3 TAD
——



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