TDA8760KSLASH2 datasheet(12/28 Pages) PHILIPS

12 / 28 page

1996 Sep 12

Philips Semiconductors

Product speciﬁcation

10-bit high-speed analog-to-digital

converter

TDA8760

SIGNAL-TO-NOISE RATIO; notes 4 and 5; see Fig.7

SNR

signal-to-noise ratio

without harmonics;

fclk = 40 MHz;

fi = 4.43 MHz; Tamb =25 °C

−

EFFECTIVE BITS; notes 4 and 5; see Fig.7

effective bits

TDA8760K/2 (fclk = 20 MHz)

fi = 4.43 MHz

−

8.70

−

bits

fi = 7.5 MHz

−

8.50

−

bits

effective bits

TDA8760K/4 (fclk = 40 MHz)

fi = 4.43 MHz

−

8.50

−

bits

fi = 10 MHz

−

8.20

−

bits

TWO-TONE

Two-tone

two-tone intermodulation

rejection

fclk = 40 MHz; note 8

−−60

−

BIT ERROR RATE

BER

bit error rate

fclk = 40 MHz;

fi = 4.43 MHz; VI = ±16 LSB

at code 512

−

× 10−12 −

times/

samples

DIFFERENTIAL GAIN; see Fig.5

Gdiff

differential gain

fclk = 20 MHz; fi = 4.43 MHz

−

0.5

−

fclk = 40 MHz; fi = 4.43 MHz

−

1.0

−

DIFFERENTIAL PHASE

Φdiff

differential phase

fclk = 40 MHz; fi = 4.43 MHz

−

0.1

0.2

deg

Timing (note 6; see Fig.3; CL=15pF)

tds

sampling delay time

−−

2ns

output hold time

−−

output delay time

−

3-state output delay times (see Fig.4)

tdZH

enable HIGH

−

tdZL

enable LOW

−

tdHZ

disable HIGH

−

812

tdLZ

disable LOW

−

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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