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ADAU1361BCPZ-R7 bảng dữ liệu(PDF) 14 Page - Analog Devices |
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ADAU1361BCPZ-R7 bảng dữ liệu(HTML) 14 Page - Analog Devices |
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14 / 78 page ![]() Data Sheet ADAU1361 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS analog.com Rev. E | 14 of 78 Table 10. Pin Function Descriptions (Continued) Pin No. Mnemonic Type1 Description 24 DVDDOUT PWR Digital Core Supply Decoupling Point. The digital supply is generated from an on-board regulator and does not require an external supply. DVDDOUT should be decoupled to DGND with a 100 nF capacitor and a 10 μF capacitor. 25 DGND PWR Digital Ground. The AGND and DGND pins can be tied together on a common ground plane. DGND should be decoupled to DVDDOUT and to IOVDD with 100 nF capacitors and 10 μF capacitors. 26 ADC_SDATA D_OUT ADC Serial Output Data. 27 DAC_SDATA D_IN DAC Serial Input Data. 28 BCLK D_IO Serial Data Port Bit Clock. 29 LRCLK D_IO Serial Data Port Frame Clock. 30 ADDR1/CDATA D_IN I2C Address Bit 1 (ADDR1). SPI Data Input (CDATA). 31 SDA/COUT D_IO I2C Data (SDA). This pin is a bidirectional open-collector input/output. The line connected to this pin should have a 2 kΩ pull-up resistor.SPI Data Output (COUT). This pin is used for reading back registers and memory locations. It is three-state when an SPI read is not active. 32 SCL/CCLK D_IN I2C Clock (SCL). This pin is always an open-collector input when in I2C control mode. The line connected to this pin should have a 2 kΩ pull-up resistor.SPI Clock (CCLK). This pin can run continuously or be gated off between SPI transactions. EP Exposed Pad Exposed Pad. The exposed pad is connected internally to the ADAU1361 grounds. For increased reliability of the solder joints and maximum thermal capability, it is recommended that the pad be soldered to the ground plane. See the Exposed Pad PCB Design section for more information. 1 A_IN = analog input, A_OUT = analog output, D_IN = digital input, D_IO = digital input/output, D_OUT = digital output, PWR = power. |
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