TDA8716 datasheet(8/21 Pages) PHILIPS

8 / 21 page

1996 Aug 26

Philips Semiconductors

Product speciﬁcation

8-bit high-speed analog-to-digital converter

TDA8716

Outputs (RL = 2.2 kΩ)

Digital 10K ECL outputs (D0 to D7; IR)

VOL

LOW level output voltage

−1850

−1770

−1600

VOH

HIGH level output voltage

−960

−880

−810

IOL

LOW level output current

−

1.8

4.0

IOH

HIGH level output current

−

2.0

4.0

Timing (fCLK = 100 MHz; RL = 2.2 kΩ; see Fig.5)

tds

sampling delay

−

13ns

tHD

output hold time

−−

output delay time

note 3

CL = 3.3 pF

−−

7.5

CL = 7.5 pF

−−

9ns

taj

aperture jitter

−

Switching characteristics

fCLK; fCLK

maximum clock frequency

120

−−

MHz

Analog signal processing (fCLK = 100 MHz)

Gdiff

differential gain

note 4

−

0.3

−

φdiff

differential phase

note 4

−

0.4

−°C

Harmonics (full scale); fi = 10 MHz; fCLK = 100 MHz

fundamental

−

even harmonics

−−60

−

odd harmonics

−−50

−

Transfer function

ILE

DC integral linearity error

−±0.5

±1

LSB

DLE

DC differential linearity error

−±0.25

±0.45

LSB

AILE

AC integral linearity error

note 4

−±1

±1.5

LSB

effective bits

Figs 13 and 14; note 5;

fCLK = 100 MHz

fi = 4.43 MHz

see Fig.10

−

7.7

−

bits

fi = 10 MHz

see Fig.11

−

7.5

−

bits

fi = 20 MHz

see Fig.12

−

7.0

−

bits

fi = 30 MHz

−

6.5

−

bits

BER

bit error rate

fCLK = 100 MHz;

fi = 10 MHz; Vi = ±8 LSB at

code 128; 50% clock duty

factor

−

10−11

−

times/

samples

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

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