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MCP2140AT-I/SS bảng dữ liệu(PDF) 29 Page - Microchip Technology

tên linh kiện MCP2140AT-I/SS
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MCP2140AT-I/SS bảng dữ liệu(HTML) 29 Page - Microchip Technology

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© 2007 Microchip Technology Inc.
DS22050A-page 29
MCP2140A
4.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
Ambient Temperature under bias ........................................................................................................... –40°C to +125°C
Storage Temperature ............................................................................................................................. –65°C to +150°C
Voltage on VDD with respect to VSS ........................................................................................................... -0.3V to +6.5V
Voltage on RESET with respect to VSS ...................................................................................................... -0.3V to +14V
Voltage on all other pins with respect to VSS ................................................................................. –0.3V to (VDD + 0.3V)
Total Power Dissipation (1) ...................................................................................................................................800 mW
Max. Current out of VSS pin .................................................................................................................................. 300 mA
Max. Current into VDD pin ..................................................................................................................................... 250 mA
Input Clamp Current, IIK (VI < 0 or VI > VDD)
................................................................................................................... ±20 mA
Output Clamp Current, IOK (V0 < 0 or V0 > VDD)
............................................................................................................. ±20 mA
Max. Output Current sunk by any Output pin..........................................................................................................25 mA
Max. Output Current sourced by any Output pin.....................................................................................................25 mA
Note 1: Power Dissipation is calculated as follows: PDIS = VDD x {IDD -
∑ IOH} + ∑ {(VDD-VOH) x IOH} + ∑(VOL x IOL)
†NOTICE: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
Note:
Voltage spikes below VSS at the RESET pin, inducing currents greater than 80 mA, may cause latch-up.
Thus, a series resistor of 50 - 100
Ω should be used when applying a “low” level to the RESET pin rather
than pulling this pin directly to VSS. .



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