93LC76A-ESLASHMSG datasheet(9/28 Pages) MICROCHIP

tên linh kiện	93LC76A-E/MSG

Giải thích chi tiết về linh kiện	8K Microwire Compatible Serial EEPROM

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DS21796H-page 9

93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C

2.8

Write

The WRITE instruction is followed by 8 bits (if ORG is

low or A-version devices) or 16 bits (if ORG pin is high

or B-version devices) of data which are written into the

specified address. The self-timed auto-erase and

programming cycle is initiated by the rising edge of CLK

on the last data bit.

The DO pin indicates the Ready/Busy status of the

device, if CS is brought high after a minimum of 250 ns

low (TCSL). DO at logical ‘0’ indicates that programming

is still in progress. DO at logical ‘1’ indicates that the

the data specified and the device is ready for another

instruction.

FIGURE 2-6:

WRITE TIMINGS

Note:

The write sequence requires a logic high

signal on the PE pin prior to the rising

edge of the last data bit.

Note:

After the Write cycle is complete, issuing a

Start bit and then taking CS low will clear

the Ready/Busy status from DO.

CLK

•••

Busy

Ready

High-Z

TWC

TCSL

TCZ

TSV

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