TCM680 datasheet(6/18 Pages) MICROCHIP

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TCM680

DS21486C-page 6

4.0

DETAILED DESCRIPTION

4.1

VOUT

- Charge Storage - Phase 1

The positive side of capacitors C1 and C2 are con-

nected to +5V at the start of this phase. C1

+ is then

switched to ground and the charge in C1

– is transferred

to C2

–. Since C

+ is connected to +5V, the voltage

potential across capacitor C2 is now 10V.

FIGURE 4-1:

Charge Pump - Phase 1.

4.2

VOUT

- Transfer - Phase 2

Phase two of the clock connects the negative terminal

of C2 to the VOUT

- storage capacitor C

3 and the positive

terminal of C2 to ground, transferring the generated

-10V to C3. Simultaneously, the positive side of capac-

itor C1 is switched to +5V and the negative side is

connected to ground.

FIGURE 4-2:

Charge Pump - Phase 2.

4.3

VOUT

+ Charge Storage - Phase 3

The third phase of the clock is identical to the first

phase – the charge stored in C1 produces -5V in the

negative terminal of C1, which is applied to the negative

side of capacitor C2. Since C2

+ is at +5V, the voltage

potential across C2 is 10V.

FIGURE 4-3:

Charge Pump - Phase 3.

4.4

VOUT

+ Transfer - Phase 4

The fourth phase of the clock connects the negative

terminal of C2 to ground and transfers the generated

10V across C2 to C4, the VOUT

+ storage capacitor.

Simultaneously, the positive side of capacitor C1 is

switched to +5V and the negative side is connected to

ground, and the cycle begins again.

FIGURE 4-4:

Charge Pump - Phase 4.

VOUT

-5V

SW4

SW1

SW2

SW3

–

VIN = +5V

VOUT

-5V

SW4

SW1

SW2

SW3

–

+5V

-10V

VOUT

-5V

SW4

SW1

SW2

SW3

–

VIN = +5V

-10V

VOUT

-5V

SW4

SW1

SW2

SW3

–

+5V

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