STPM01FTR datasheet(38/56 Pages) STMICROELECTRONICS

tên linh kiện	STPM01FTR

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Theory of operation

STPM01

38/56

further divided into a pair of 4-bit nibbles, most and least significant nibble (msn, lsn). This

division makes sense with the MSB of data value because the msn of it holds the parity

code rather than useful data.

The sequence of data record during the reading operation is fixed. Normally, an application

will read 1st,.., 6th data record, the 7th and 8th data record would read only when it need to

fetch the configuration data. However, an application may apply a Precharge command (see

Table 18) prior reading phase. This command forces the device to respond with the

sequence 5th,.., 8th, 1st,.., 4th. Such change of sequence can be used to skip the first four

data records.

The timing diagram of the reading operation is shown on the Figure 22. One can see the

latching and beginning of shifting phase of the first byte (0x5F) of the first data record and

end of reading. Also, both alternatives to reset the internal transmission serial clock counter

is shown in signal SYN.

Figure 24.

Data records reconstruction

STPM01FTR bảng dữ liệu(PDF) 38 Page - STMicroelectronics