LTC2630AISC6-HM8TRMPBF datasheet(13/20 Pages) LINER

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LTC2630

2630f

TIMING DIAGRAM

The LTC2630 is a family of single voltage output DACs in

6-lead SC70 packages. Each DAC can operate rail-to-rail

referenced to the input supply, or with its full-scale volt-

age set by an integrated reference. Twelve combinations

of accuracy (12-, 10-, and 8-bit), power-on reset value

(zero or midscale), and full-scale voltage (2.5V or 4.096V)

are available. The LTC2630 is controlled using a 3-wire

SPI/MICROWIRE compatible interface.

Power-On Reset

The LTC2630-HZ/-LZ clear the output to zero scale when

power is ﬁrst applied, making system initialization con-

sistent and repeatable.

For some applications, downstream circuits are active

during DAC power-up, and may be sensitive to nonzero

outputs from the DAC during this time. The LTC2630

contains circuitry to reduce the power-on glitch: the

analog output typically rises less than 5mV above zero

scale during power on if the power supply is ramped

to 5V in 1ms or more. In general, the glitch amplitude

decreases as the power supply ramp time is increased.

See “Power-On Reset Glitch” in the Typical Performance

Characteristics section.

The LTC2630-HM/-LM provide an alternative reset, setting

the output to midscale when power is ﬁrst applied.

SDI

CS/LD

SCK

t10

2630 F01

OPERATION

Transfer Function

The digital-to-analog transfer function is

OUT IDEAL

REF

() =

⎛

⎝⎜

⎞

⎠⎟

where k is the decimal equivalent of the binary DAC

input code, N is the resolution, and VREF is either 2.5V

(LTC2630-L) or 4.096V (LTC2630-H) in internal refer-

ence mode, and VCC in Supply as reference mode.

Table 1. Command Codes

Command*

Write to Input Register

Update (Power up) DAC Register

Write to and Update (Power up) DAC Register

Power down

Select Internal Reference (Power-on Reset Default)

Select Supply as Reference (VREF = VCC )

*Command codes not shown are reserved and should not be used.

Figure 1. Serial Interface Timing

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