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AD9172-FMC-EBZ bảng dữ liệu(PDF) 2 Page - Analog Devices

tên linh kiện AD9172-FMC-EBZ
Giải thích chi tiết về linh kiện  Dual, 16-Bit, 12.6 GSPS RF DAC with Channelizers
PDF  146 Pages
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nhà sản xuất  AD [Analog Devices]
Trang chủ  http://www.analog.com
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AD9172-FMC-EBZ bảng dữ liệu(HTML) 2 Page - Analog Devices

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Data Sheet
AD9172
TABLE OF CONTENTS
analog.com
Rev. C | 2 of 146
Features ............................................................... 1
Applications........................................................... 1
General Description ..............................................1
Product Highlights................................................. 1
Functional Block Diagram......................................3
Specifications........................................................ 4
DC Specifications............................................... 4
Digital Specifications.......................................... 5
Maximum DAC Sampling Rate
Specifications................................................... 5
Power Supply DC Specifications........................6
Serial Port and CMOS Pin Specifications.......... 9
Digital Input Data Timing Specifications...........10
JESD204B Interface Electrical and Speed
Specifications ................................................ 11
Input Data Rates and Signal Bandwidth
Specifications ................................................ 12
AC Specifications ............................................ 13
Absolute Maximum Ratings.................................15
Reflow Profile................................................... 15
Thermal Characteristics................................... 15
ESD Caution.....................................................15
Pin Configuration and Function Descriptions...... 16
Typical Performance Characteristics .................. 19
Terminology......................................................... 25
Theory of Operation.............................................27
Serial Port Operation........................................... 29
Data Format..................................................... 29
Serial Port Pin Descriptions..............................29
Serial Port Options........................................... 29
JESD204B Serial Data Interface......................... 31
JESD204B Overview........................................31
Physical Layer..................................................35
Data Link Layer................................................ 36
Syncing LMFC Signals..................................... 39
Transport Layer................................................ 45
JESD204B Test Modes ................................... 46
JESD204B Error Monitoring............................. 48
Digital Datapath................................................... 50
Total Datapath Interpolation............................. 50
Channel Digital Datapath................................. 52
Main Digital Datapath.......................................55
Interrupt Request Operation................................ 61
Interrupt Service Routine .................................61
Applications Information...................................... 62
Hardware Considerations.................................62
Analog Interface Considerations......................... 65
DAC Input Clock Configurations.......................65
Clock Output Driver.......................................... 67
Analog Outputs.................................................67
Start-Up Sequence.............................................. 68
Register Summary...............................................75
Register Details................................................... 87
Outline Dimensions........................................... 146
Ordering Guide...............................................146
Evaluation Boards.......................................... 146
REVISION HISTORY
5/2022—Rev. B to Rev. C
Deleted Figure 31 and Figure 32, Renumbered Sequentially........................................................................19
Changes to Table 49......................................................................................................................................68
Changes to Table 52 and Table 53................................................................................................................ 69
Changes to Table 58......................................................................................................................................74
Changes to Table 59......................................................................................................................................75
Changes to Table 60......................................................................................................................................87



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