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LD5535A1GL bảng dữ liệu(PDF) 13 Page - Leadtrend Technology

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LD5535E1/A1
10/05/2017
13
Leadtrend Technology Corporation
www.leadtrend.com.tw
LD5535E1/A1-DS-00 October 2017
OVP events. The counter has been added to prevent
incorrect OVP detection which might occur during ESD or
lightning events. However, when typically 8 cycles of
subsequent OVP events are detected, the OVP circuit
switches the power MOSFET off. As the protection is latch,
the converter restarts after the AC is plug out and in.
ROCP
RS
CS
AUX
0.31V
OUT
Sample
Delay
Debouce
8 cycle
OVP
Fig. 17
Delay
Sample
Out
AUX Winding
CS/OVP
Fig. 18
OTP Pin
– Auto Recovery
The OTP circuit is implemented to sense whether there is
any hot-spot of power circuit like power MOSFET or
output rectifier. Once an over-temperature condition is
detected, the OTP is enabled to shut down the controller
to protect the controller. Typically, a NTC is recommended
to connect with OTP pin. The NTC resistance will
decrease as the device or ambient in high temperature.
The relationship is as below.
NTC
OTP
R
A
μ
100
V
When the VOTP is lower than the defined voltage threshold
(typ. 0.95V), the LD5535E1/A1 is going to shut down gate
output. Restarting LD5535E1/A1 successfully has to cool
down the circuit so that NTC resistance will increase and
raise VOTP up above 1.05V.
Secondary Diode Short Protection (SDSP)
–
Auto Recovery
The method that the LD5535E1/A1 judges the logic of
SDSP is described briefly as follows. When VCS is higher
than 1.2V, it will reduce the frequency first, even the Ton <
LEB+TPD. When the count is up to 4 times, its gate will be
turned-off, shown as Fig. 19.
Fig. 19
Fault Protection
There are several critical protections integrated in the
LD5535E1/A1 to prevent from damage to the power
supply. Those damages usually come from open or short
conditions on the pins of LD5535E1/A1.
In case under such conditions listed below, the gate
output will turn off immediately to protect the power circuit.
1.
CS pin floating
2.
COMP pin floating
Comp
CS
1.2V
4 cycle



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