LD5523TGL datasheet(10/15 Pages) LEADTREND

10 / 15 page

LD5523T

04/08/2021

Leadtrend Technology Corporation

www.leadtrend.com.tw

LD5523T-DS-00 April 2021



Inductance of primary winding



Resonance equivalent parasitic capacitance

If VDS voltage falls to resonant valley level from max

plateau value, the QRD comparator will be tripped while

FB pin current is close to 20

A.

However, the QR detection will be influenced by

propagation delay. If inductance of primary winding is

less than 500µH, there is barb in Vds (as shown in Fig.

11).

Fig. 11

Voltage Feedback Loop

The voltage feedback signal is provided from the TL431

at the secondary side through the photo-coupler to the

COMP pin of the LD5523T. Similar to UC3842, the

LD5523T would without voltage offset to feed the

voltage divider at the ratio of RA and RB, that is,

COMP

)

PWM

(

COMPARATOR

A pull-high resistor is embedded internally and therefore

no external one is required.

The LD5523T integrates the multi-mode PWM controller,

and for enhance the light load efficiency, the comp pin

value corresponding to the frequency is as shown in Fig.

12.

Fig. 12

Current Sensing, Leading Edge Blanking

The typical current mode of PWM controller feedbacks

both current signal and voltage signal to close the

control loop and achieve regulation. The LD5523T

detect the primary MOSFET current from the CS pin,

which is not only for the peak current mode control but

also for the pulse-by-pulse current limit. The maximum

voltage threshold of the current sensing pin sets at 0.5V.

From above, the MOSFET peak current can be obtained

from below.

)

MAX

(

PEAK



A 450ns leading-edge blanking (LEB) time is included in

the input of CS pin to prevent the false-trigger from the

current spike. In the low power application, if the total

pulse width of the turn-on spike is less than 450ns and

the negative spike on the CS pin doesn’t exceed -0.3V,

it could remove the R-C filter (as shown in the Fig. 13).

However, the total pulse width of the turn-on spike is

decided by the output power, circuit design and PCB

layout. It is strongly recommended to adopt a smaller

R-C filter (as shown in Fig. 14) for higher power

application to avoid the CS pin being damaged by the

negative turn-on spike.

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