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AD5940 bảng dữ liệu(PDF) 2 Page - Analog Devices |
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AD5940 bảng dữ liệu(HTML) 2 Page - Analog Devices |
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2 / 143 page ![]() Data Sheet AD5940/AD5941 TABLE OF CONTENTS analog.com Rev. D | 2 of 143 Features................................................................ 1 Applications........................................................... 1 Simplified Block Diagram.......................................1 Functional Block Diagram......................................5 General Description...............................................6 Specifications........................................................ 7 ADC RMS Noise Specifications....................... 16 SPI Timing Specifications.................................17 Absolute Maximum Ratings.................................18 Thermal Resistance......................................... 18 ESD Caution.....................................................18 Pin Configuration and Function Descriptions...... 19 Typical Performance Characteristics................... 22 Reference Test Circuit...................................... 24 Theory of Operation.............................................25 Configuration Registers....................................25 Silicon Identification.............................................28 Identification Registers..................................... 28 System Initialization.............................................29 Low Power DAC.................................................. 30 Low Power DAC Switch Options...................... 30 Relationship Between the 12-Bit and 6-Bit Outputs...........................................................31 Low Power DAC Use Cases............................ 31 Low Power DAC Circuit Registers....................32 Low Power Potentiostat.......................................36 Low Power TIA.................................................... 37 Low Power TIA Protection Diodes....................37 Using an External RTIA..................................... 37 Recommended Switch Settings for Various Operating Modes............................................37 Low Power TIA Circuits Registers....................39 High Speed DAC Circuits.................................... 43 High Speed DAC Output Signal Generation.... 43 Power Modes of the High Speed DAC Core.... 43 High Speed DAC Filter Options........................43 High Speed DAC Output Attenuation Options..45 High Speed DAC Excitation Amplifier.............. 45 Coupling an AC Signal from the High Speed DAC to the DC Level Set by the Low Power DAC.....................................................45 Avoiding Incoherency Errors Between Excitation and Measurement Frequencies During Impedance Measurements................. 45 High Speed DAC Calibration Options.............. 46 High Speed DAC Circuit Registers...................47 High Speed TIA Circuits...................................... 50 High Speed TIA Configuration..........................50 High Speed TIA Circuit Registers.....................52 High Performance ADC Circuit............................54 ADC Circuit Overview.......................................54 ADC Circuit Diagram........................................ 54 ADC Circuit Features....................................... 55 ADC Circuit Operation......................................55 ADC Transfer Function.....................................55 ADC Low Power Current Input Channel...........56 Selecting Inputs to ADC Mux........................... 56 ADC Postprocessing........................................ 57 Internal Temperature Sensor Channel............. 57 50 Hz/60 Hz Mains Rejection Filter.................. 57 ADC Calibration................................................57 ADC Circuit Registers...................................... 58 ADC Calibration Registers............................... 64 ADC Digital Postprocessing Registers (Optional)........................................................71 ADC Statistics Registers.................................. 72 Programmable Switch Matrix...............................74 Switch Descriptions.......................................... 74 Recommended Configuration in Hibernate Mode.............................................................. 74 Options for Controlling All Switches................. 74 Programmable Switches Registers.................. 76 Precision Voltage References............................. 87 High Power and Low Power Buffer Control Register—BUFSENCON................................87 Sequencer........................................................... 89 Sequencer Features.........................................89 Sequencer Overview........................................ 89 Sequencer Commands.....................................89 Sequencer Operation....................................... 91 Sequencer and FIFO Registers........................93 Waveform Generator........................................... 99 Waveform Generator Features.........................99 Waveform Generator Operation....................... 99 Using the Waveform Generator with the Low Power DAC............................................. 99 Waveform Generator Registers........................99 SPI Interface......................................................104 Overview........................................................ 104 SPI Pins..........................................................104 SPI Operation.................................................104 Command Byte...............................................104 Writing to and Reading from Registers.......... 104 Reading Data from the Data FIFO................. 104 ECC for DATA FIFO...........................................106 ECC Algorithm................................................106 Sleep and Wake-Up Timer................................ 107 Sleep and Wake-Up Timer Features.............. 107 |
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