TDA1546T datasheet(13/40 Pages) PHILIPS

13 / 40 page

January 1995

Philips Semiconductors

Preliminary speciﬁcation

Bitstream Continuous Calibration DAC with

digital sound processing (BCC-DAC)

TDA1546T

Table 4

Extended microcontroller control register ﬁle

EXTENDED

ADDRESS

ED3

ED2

ED1

ED0

INITIAL

STATE

USED FOR

EA2

EA1

EA0

INS1

INS0

DSM

CLRM

0 0 0 0

input format; double-speed mode;

clear memory

PVIV1

PVIV0

PINM1 PINM0

0 0 1 0

polarity and function versatile output pins

LONLY TRI

ACDT

DCDT

0 0 1 1

left only; 3

× reserved

CLKIV

CLKON

DYC1

DYC0

0 0 0 0

× reserved

The following programming values for the various control

words in the register file are given below.

7.3.3.1

Volume control register bits: BAL3 to BAL0

and BAR3 to BAR0

Balance: a 4-bit value to program left channel attenuation

(BAL3 to BAL0) and a 4-bit value to program right channel

attenuation (BAR3 to BAR0). The range is

0dBto

−22.5 dB in steps of 1.5 dB (see Section 7.7.1).

7.3.3.2

Volume control register bits: VC7 to VC0 and

FT3 to FT0

Volume control set number: an 8-bit value to program

volume control coefficient set (6 dB to

−90 dB, in steps of

0.375 dB, VC7 to VC0); a 4-bit value to program fade time

(6 ms to 22.4 s, FT3 to FT0) (see Section 7.7.2).

7.3.3.3

Volume control register bit: MUTE

Digital soft mute control bit: logic 1 to activate mute and

logic 0 to deactivate (see Section 7.7.3).

7.3.3.4

Volume control register bit: RUNFA

Function control bit: logic 1 to activate the volume control

(after new fade time and/or volume control setting) (see

Section 7.7.2.).

7.3.3.5

Sound monitor register bits: FP2 to FP0

Frequency range control bits (see Section 7.9.1).

7.3.3.6

Sound monitor register bits: OVER3 to OVER0

Overload detection level (dB linear; 0 dB to

−45 dB, in

steps of

−3 dB) (see Section 7.9.5).

7.3.3.7

Sound monitor register bits: SIL3 to SIL0 and

SILT3 to SILT0

Digital silence set numbers: a 4-bit value to program digital

silence detection level

−48 dB to ∞ dB (SIL3 to SIL0) and

a 4-bit value to program digital silence duration

0.2 s to 3.2 s (SILT3 to SILT0) (see Section 7.9.4).

7.3.3.8

Sound monitor register bit SPOS

This bit controls the position of the spectrum analyzer.

When SPOS = 1 the position of spectrum analyzer

precedes the tone control sections. When SPOS = 0 the

position of the spectrum analyzer succeeds the tone

control sections.

7.3.3.9

Sound processing register bit: DSS

Digital speaker system programming bit

(see Section 7.8.6).

7.3.3.10

Sound processing register bits: SCT3 to SCT0

Treble coefficient set number: a 4-bit value to program

digital treble coefficient set (see Section 7.8.2).

7.3.3.11

Sound processing register bits: SCB3 to SCB0

Bass coefficient set number: a 4-bit value to program

digital bass coefficient set (see Section 7.8.3).

7.3.3.12

Sound processing register bits: SCBB3 to

SCBB0

Bass boost coefficient set number: a 4-bit value to program

digital bass boost coefficient set (see Section 7.8.4). This

is also used for digital speaker system configuration

(see Section 7.8.6).

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