EM5201 datasheet(11/13 Pages) EXCELLIANCE

11 / 13 page

2018/09/28

A.8

EM5201

Functional Description

VIN and VBIAS Voltage Range

The MOSFET gate voltage in the EM5201 is driven

by an internal charge pump. The output voltage of

the charge pump is dependent on the voltage on

VBIAS pin. Care must be taken to ensure a sufficient

VBIAS is used to keep the desired output rising time

when given the anticipated input voltage. For

quickly output

rising requirement that may be under

60usec, make sure VIN

≤ (VBIAS – 2V) is highly

recommended. For example, in order to have VIN=3V,

VBIAS must be 5V. The Ron of EM5201 will still be keep

constant if VIN > (VBIAS

– 2V) but it will exhibit slowly

output rising time. See figure as below.

ON/OFF Control

EM5201 is enabled if the voltage of the Von pin is

greater than logic high level and the VBIAS voltage

has an adequate applied. If the voltage of the EN

pin is less than logic low level, the device will be

disabled.

Input Capacitor CIN

The EM5201 do not require an input capacitor. In

order to limit the voltage drop on the input supply

caused by transient inrush current, an input bypass

capacitor

recommended.

1uF

ceramic

capacitor should be placed as closed as possible to

the VIN pin. Higher values capacitor can help to

further reduce the voltage drop.

Output Capacitor Co

Due to the integrated body diode in the NMOS

switch, the CIN greater than Co is highly

recommended. A CIN to Co ratio of 10 to 1 is

recommended for minimizing VIN drop caused by

inrush during startup. It also helps to prevent

parasitic inductance forces Vo below GND when

switching off. A 0.1uF ceramic capacitor should be

placed as closed as possible to the Vo pin.

Thermal and Layout Consideration

EM5201 is designed to maintain a constant output

load current. Due to physical limitations of the chip

layout and assembly of the device the maximum

switch current is 10A. All copper traces for the VIN

and Vo pin should be widely and short to carry the

maximum continuous current and obtain the best

effect. The input and output capacitor should be

close to the device as possible to minimize the

parasitic trace inductances and prevents the

voltage drop when load transient.

The maximum IC junction temperature should be

restricted to 125 ℃

under normal operating

conditions. To calculate the maximum allowable

dissipation, PD(MAX) for a given output current and

ambient temperature, used the following equation:

MAX







)

(

)

(

Where:

PD(MAX)=Maximum allowable power dissipation

TJ(MAX)=Maximum allowable junction temperature

(125 ℃ for the EM5201)

TA=Ambient Temperature of the device

ΘJA= Junction to air thermal impedance. This

parameter is also

dependent upon PCB layput.

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