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SCN68681 bảng dữ liệu(PDF) 21 Page - NXP Semiconductors |
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SCN68681 bảng dữ liệu(HTML) 21 Page - NXP Semiconductors |
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21 / 28 page ![]() Philips Semiconductors Product specification SCN68681 Dual asynchronous receiver/transmitter (DUART) 1998 Sep 04 21 tCLK tCTC tRx tTx X1/CLK CTCLK RxC TxC +5V 1K Ω X1 X2 X2 3.6864MHz X1 C1 C2 DRIVING FROM EXTERNAL SOURCE SCN2681 74LS04 CLOCK TO OTHER CHIPS 1K +5V CRYSTAL SERIES RESISTANCE3 SHOULD BE LESS THAN 180 Ω R1: 100K - 1Meg (See design note) C1 = C2: 0-5pF + (STRAY < 5pF) tCLK tCTC tRx tTx OPEN When using an external clock it is preferred to drive X2 and leave X1 open. X2 is the input to the internal driver, while X1 is the output. TO THE REST OF THE DUART CIRCUITS R1 U1 R1 is only required if U1 will not drive to X2 high level. Previous specifications indicated X2 should be grounded and X1 should be driven. This is still acceptable. It is electrically easier to drive the amplifier input than to overdrive its output. R2 R2 = 50k Ω to 150kΩ SD00115 Figure 9. Clock Timing NOTES: 1. INTRN or OP3 – OP7 when used as interrupt outputs. 2. The test for open drain outputs is intended to guarantee switching of the output transistor. Measurement of this response is referenced from the mid point of the switching signal, VM, to a point 0.5 volts above VOL. This point represents noise margin that assures true switching has occurred. Beyond this level, the effects of external circuitry and test environment are pronounced and can greatly affect the resultant measurement. VM VOL +0.5V VOL CSN (READ OR WRITE) INTERRUPT1 OUTPUT tIR SD00116 Figure 10. Interrupt Timing tTXD tTCS 1 BIT TIME (1 OR 16 CLOCKS) TxD TxC (INPUT) TxC (1X OUTPUT) SD00117 Figure 11. Transmit Timing |
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