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S71PL129JC0 bảng dữ liệu(PDF) 141 Page - SPANSION |
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S71PL129JC0 bảng dữ liệu(HTML) 141 Page - SPANSION |
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141 / 153 page  October 28, 2005 S71PL129Jxx_00_A8 S71PL129JC0/S71PL129JB0/S71PL129JA0 139 Advance Informatio n AC Characteristics Power Down Parameters Notes: 1. Applicable also to power-up. 2. Applicable when 4Mb and 8Mb Partial modes are programmed. Other Timing Parameters Notes: 1. Some data might be written into any address location if tCHWX(min) is not satisfied. 2. The Input Transition Time (tT) at AC testing is 5ns as shown in below. If actual tT is longer than 5ns, it can violate the AC specification of some of the timing parameters. Parameter Symbol 16M 32M 64M Unit Note Min. Max. Min. Max. Min. Max. CE2 Low Setup Time for Power Down Entry tCSP 10 — 10 — 10 — ns CE2 Low Hold Time after Power Down Entry tC2LP 80 — 65 — 65 — ns CE1# High Hold Time following CE2 High after Power Down Exit [SLEEP mode only] tCHH 300 — 300 — 300 — μs1 CE1# High Hold Time following CE2 High after Power Down Exit [not in SLEEP mode] tCHHP N/A 1 — 1 — μs2 CE1# High Setup Time following CE2 High after Power Down Exit tCHS 0— 0— 0— ns 1 Parameter Symbol 16M 32M 64M Unit Note Min. Max. Min. Max. Min. Max. CE1# High to OE# Invalid Time for Standby Entry tCHOX 10 — 10 — 10 — ns CE1# High to WE# Invalid Time for Standby Entry tCHWX 10 — 10 — 10 — ns 1 CE2 Low Hold Time after Power-up tC2LH 50 — 50 — 50 — μs CE1# High Hold Time following CE2 High after Power-up tCHH 300 — 300 — 300 — μs Input Transition Time tT 125 1 25125 ns 2 |
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