IRFS4410ZPBF datasheet(7/11 Pages) IRF

7 / 11 page

IRF/B/S/SL4410ZPbF

www.irf.com

Fig 23a. Switching Time Test Circuit

Fig 23b. Switching Time Waveforms

Fig 22b. Unclamped Inductive Waveforms

Fig 22a. Unclamped Inductive Test Circuit

Fig 24a. Gate Charge Test Circuit

Fig 24b. Gate Charge Waveform

Fig 21.

Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET® Power MOSFETs

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

P.W.

Period

di/dt

Diode Recovery

dv/dt

Ripple

≤ 5%

Body Diode

Forward Drop

Re-Applied

Voltage

Reverse

Recovery

Current

Body Diode Forward

Current

VGS=10V

VDD

ISD

Driver Gate Drive

D.U.T. ISD Waveform

D.U.T. VDS Waveform

Inductor Curent

D =

P.W.

Period

* VGS = 5V for Logic Level Devices

VDD

• dv/dt controlled by RG

• Driver same type as D.U.T.

• ISD controlled by Duty Factor "D"

• D.U.T. - Device Under Test

D.U.T

Inductor Current

VCC

DUT

20K

Vds

Vgs

Vgs(th)

Qgs1

Qgs2

Qgd

Qgodr

IAS

0.01

Ω

D.U.T

VDS

- VDD

DRIVER

15V

20V

V(BR)DSS

IAS

VGS

VDD

VDS

D.U.T

Second Pulse Width < 1µs

Duty Factor < 0.1%

VDS

VGS

90%

10%

td(off)

td(on)

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