LM4040 datasheet(27/51 Pages) VISHAY

27 / 51 page

www.ti.com

APPLICATION INFORMATION

Start-Up Characteristics

1-Hz Rate

LM4040

VIN

Output Capacitor

SOT-23 Connections

Use With ADCs or DACs

VREF

AIN0

AIN1

AIN2

AGND

DB11

DB10

DB9

DB8

DB7

DB6

DB5

DGND

AIN3

VANA

2.2

µF

CLK

DB0

DB1

DB2

DB3

DB4

VDIG

BUSY

3.2-MHz Clock

BUSY Output

Write Input

Read Input

5-V Analog Supply

µF

0.1

µF

ADS7842

LM4040A-41

909

0 V to VREF

5 V

LM4040

PRECISION MICROPOWER SHUNT VOLTAGE REFERENCE

SLOS456J – JANUARY 2005 – REVISED SEPTEMBER 2006

Figure 7. Test Circuit

The LM4040 does not require an output capacitor across cathode and anode for stability. However, if an output

bypass capacitor is desired, the LM4040 is designed to be stable with all capacitive loads.

There is a parasitic Schottky diode connected between pins 2 and 3 of the SOT-23 packaged device. Thus, pin

3 of the SOT-23 package must be left floating or connected to pin 2.

The LM4040x-41 is designed to be a cost-effective voltage reference as required in 12-bit data-acquisition

systems. For 12-bit systems operating from 5-V supplies such as the ADS7842 (see Figure 8), the LM4040x-41

(4.096 V) permits operation with an LSB of 1 mV.

Figure 8. Data-Acquisition Circuit With LM4040x-41

Submit Documentation Feedback

LM4040 bảng dữ liệu(PDF) 27 Page - Vishay Siliconix

LM4040 bảng dữ liệu(HTML) 27 Page - Vishay Siliconix

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51

bảng dữ liệu tải về

Link URL