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011100 0

A

C

K

A

C

K

A

C

K

A

C

K

A

C

K

address

ADDR H

ADDR L

DATA H

DATA M

R/W

MGD568

auto increment if repeated n-groups of 3 (2) bytes

P

A

C

K

DATA L

Fig.15 Master transmitter writes to the DSP registers.

S = START condition.

ACK = acknowledge from DSP (SDA LOW).

ADDR H and ADDR L = address DSP register.

DATA H, DATA M and DATA L = data of XRAM or registers.

DATA H and DATA M = data of YRAM.

P = STOP condition.

011100 0

A

C

K

A

C

K

A

C

K

A

C

K

A

C

K

address

011

1

100

ADDR H

ADDR L

DATA H

R/W

MGA808 - 1

auto increment if repeated n-groups of 3 (2) bytes

P

A

C

K

A

C

K

DATA M

DATA L

R/W

Fig.16 Master transmitter reads from the DSP registers.

S = START condition.

ACK = acknowledge from DSP (SDA LOW).

ADDR H and ADDR L = address DSP register.

DATA H, DATA M and DATA L = data of XRAM or registers.

DATA H and DATA M = data of YRAM.

P = STOP condition.