
2-577
RF5117C
Rev A5 060517
The RF5117C can be used with an IEEE802.11g modulation with a few modifications. Pin 2 should not be connected to
ground and a 4.7k
Ω resistor should be placed on the V
REG1 line. This is done on the evaluation board by cutting the
VREG1 trace and placing the resistor on the open line. All other components should not be modified and the IEEE802.11g
schematic should be followed as closely as possible.
Power sensing is implemented with the PWR SEN and PWR REF lines. The outputs of these pins are transistor collec-
tors and need to be pulled up to the supply through a resistor. PWR REF provides an output current proportional to the
output stage bias current, and PWR SEN provides an output current proportional to the total (RF and bias) current of the
output stage. The pull-up resistors convert these currents to voltages, and the voltage difference between these two pins
is proportional to the RF current. See the graph, “VREF-VSENSE versus POUT”, for the response of this signal. This differ-
ence signal can be fed to a power control circuit elsewhere in the end product, or it can be processed at the PA with addi-
tional circuitry and used to adjust the VREG voltage(s) to implement automatic level control. Contact RFMD Sales or
Applications Engineering for additional data and guidance in using this feature.
The RF5117C has primarily been characterized with a voltage on VREG1 and VREG2 of 2.7VDC. However, the RF5117C
will operate from a wide range of control voltages. If you prefer to use a control voltage that is significantly different than
2.7VDC, contact RFMD Sales or Applications Engineering for additional data and guidance.