RF2461PCBA-41X datasheet(5/12 Pages) RFMD

5 / 12 page

8-107

RF2461

Rev B6 060925

Function

Description

Interface Schematic

IF2+

First differential output pin for the second mixer. Open collector. A cur-

rent combiner external network performs a differential to single-ended

conversion and sets the output impedance. A DC blocking cap must be

present if the IF filter input has a DC path to ground. Mixer (IF2+ and

IF2-) needs to “see” a differential impedance between 2k

Ω to 4kΩ.

VCC2

VCC pin for the LO buffer/bias circuitry.

LO IN

LO limiter input pin.

ENABLE

This pin is used to enable or disable the RF2461. A logic high (>2.0V)

enables the circuitry. A logic low (<1.0V) disables the circuitry.

IP SET

Controls the setting of the LNA current. A logic low (<1.0V) selects the

internal resistance (49.5k

Ω), resulting in an LNA current of 5mA. A

logic high (>2.0V) selects the external resistance at pin 8.

IF SEL

Determines which IF port is active. A logic low (<1.0V) activates IF1

and deactivates IF2. A logic high (>2.0V) activates IF2 and deactivates

IF1. Mixers are identical. Either IF output may be used for CDMA or

AMPS applications.

Pkg

Base

GND

Ground connection. The backside of the package should be soldered to

a top side ground pad which is connected to the ground plane with mul-

tiple vias.

IF2-

IF2+

LO IN

ENABLE

IP SET

IF SEL

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