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SP730 bảng dữ liệu(PDF) 2 Page - Sipex Corporation |
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SP730 bảng dữ liệu(HTML) 2 Page - Sipex Corporation |
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2 / 7 page ![]() 2 Date: 11/15/05 SP730 Microprocessor Supervisory Circuit © Copyright 2005 Sipex Corporation V DD ................................................................................................. 6.0V All inputs and outputs w.r.t. GND ............................... -0.6 to V DD+ 1.0V Storage Temperature .................................................. -65°C to +150°C Ambient Temperature with power applied.....................-65°C to +125°C ESD Protection on all pins ............................................................ ≥2kV These are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. V DD = 1.0V - 5.5V ; -40°C to 85°C. The ♦ denotes the specifications which apply over the full operating temperature range, unless otherwise specified. ABSOLUTE MAXIMUM RATINGS PIN NUMBER PIN NAME 3 PIN SOT-23 DESCRIPTION 1 RESET Active Low. This pin goes low whenever V DD falls below the reset threshold. 2V DD Supply input. 3 GND Ground. PIN DESCRIPTION ELECTRICAL CHARACTERISTICS r e t e m a r a Pl o b m y S. n i M. p y T. x a Ms t i n Us n o i t i d n o C e g n a R e g a t l o V g n i t a r e p OV D D 0 . 15 . 5 ♦ V V D D T E S E R o t e u l a VV N I M D D 0 . 1 ♦ V t n e r r u C g n i t a r e p OI D D 5 40 6 ♦ A µV D D ) d a o l o n ( V 5 . 5 = V D D t n i o P p i r TV P I R T 0 . 35 7 0 . 35 1 . 3 ♦ V 5 2 . 45 7 3 . 40 5 . 4 ♦ s i s e r e t s y H d l o h s e r h TV S Y H 0 5 ♦ V m t u p t u O l e v e L w o L T E S E R e g a t l o V V L O 6 . 0 ♦ V I L O V , A m 5 . 8 = D D = V N I M P I R T t u p t u O l e v e L h g i H T E S E R e g a t l o V V H O V D D 7 . - ♦ V I H O V , A µ 0 5 = D D > V P I R TX A M r o t s i s e R p u ll u P5 ♦ Ω K V D D e v i t c a n I T E S E R o t t c e t e Dt U P R 0 5 10 5 30 0 7 ♦ s m V D D T E S E R o t t c e t e Dt D P R 0 1 ♦ S µ V D D m o r f d e p m a r V X A M P I R T V ( + X A M P I R T V ( o t ) V m 0 5 2 - N I M P I R T ) V m 0 5 2 |
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