SAA2013 datasheet(21/32 Pages) PHILIPS

21 / 32 page

May 1994

Philips Semiconductors

Preliminary speciﬁcation

Adaptive allocation and scaling for PASC

coding in DCC systems

SAA2013

CHARACTERISTICS

VDD = 2.7 to 5.5 V; VSS = 0 V;Tamb = −40 to 85 °C; unless otherwise speciﬁed; IOL and IOH derated by 75% for

VDD < 4.5 V.

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

Supply

VDD

supply voltage

2.7

5.0

5.5

IDD

supply current

VDD = 3.0 V

VDD = 5.0 V

Istb

standby current

VDD = 5.0 V

−−

400

µA

Inputs

VIL

LOW level input voltage

−

0.3VDD

VIH

HIGH level input voltage

0.7VDD

−

VDD

ILI

input leakage current

VI =0toVDD

−10

−

+10

µA

input capacitance

−−

Outputs

VOL

LOW level output voltage

IOL = 4 mA

−

0.4

VOH

HIGH level output voltage

IOH = −4mA

VDD − 0.4

−

VDD

load capacitance

−−

Inputs/outputs

VIL

LOW level input voltage

−

0.3VDD

VIH

HIGH level input voltage

0.7VDD

−

VDD

ILI

3-state leakage current

VI =0toVDD

−10

−

+10

µA

input capacitance

−−

VOL

LOW level output voltage

IOL = 4 mA

−

0.4

VOH

HIGH level output voltage

IOH = −4mA

VDD − 0.4

−

VDD

load capacitance

−−

Clock input CLK24

input frequency

see Fig.19

−

24.576

−

MHz

rise time

−−

7ns

fall time

−−

7ns

tcH

HIGH time

−−

tcL

LOW time

−−

Clock input FS256

input frequency

fs =48kHz

−

12.288

−

MHz

fs = 44.1 kHz

−

11.2896

−

MHz

fs =32kHz

−

8.192

−

MHz

rise time

−−

7ns

fall time

−−

7ns

tcH

HIGH time

−−

tcL

LOW time

−−

SAA2013 bảng dữ liệu(PDF) 21 Page - NXP Semiconductors

SAA2013 bảng dữ liệu(HTML) 21 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

bảng dữ liệu tải về

Link URL