MPC855T datasheet(17/80 Pages) FREESCALE

17 / 80 page

MPC860 Family Hardware Specifications, Rev. 7

Freescale Semiconductor

Bus Signal Timing

B30

CS, WE(0:3) negated to A(0:31),

BADDR(28:30) invalid GPCM write

access 8

5.58

—

4.25

—

3.00

—

1.79

—

B30a

WE(0:3) negated to A(0:31),

BADDR(28:30) invalid GPCM, write

access, TRLX = 0, CSNT = 1,

CS negated to A(0:31) invalid GPCM

write access, TRLX = 0, CSNT =1

ACS = 10, or ACS = 11, EBDF = 0

13.15

—

10.50

—

8.00

—

5.58

—

B30b

WE(0:3) negated to A(0:31),

invalid GPCM BADDR(28:30) invalid

GPCM write access, TRLX = 1,

CSNT = 1. CS negated to A(0:31),

Invalid GPCM, write access,

TRLX = 1, CSNT = 1, ACS = 10, or

ACS = 11, EBDF = 0

43.45

—

35.50

—

28.00

—

20.73

—

B30c

WE(0:3) negated to A(0:31),

BADDR(28:30) invalid GPCM write

access, TRLX = 0, CSNT = 1.

CS negated to A(0:31) invalid GPCM

write access, TRLX = 0, CSNT = 1,

ACS = 10, ACS = 11, EBDF = 1

8.36

—

6.38

—

4.50

—

2.68

—

B30d

WE(0:3) negated to A(0:31),

BADDR(28:30) invalid GPCM write

access, TRLX = 1, CSNT =1.

CS negated to A(0:31) invalid GPCM

write access TRLX = 1, CSNT = 1,

ACS = 10, or ACS = 11, EBDF = 1

38.67

—

31.38

—

24.50

—

17.83

—

B31

CLKOUT falling edge to CS

valid—as requested by control bit

CST4 in the corresponding word in

UPM

1.50

6.00

1.50

6.00

1.50

6.00

1.50

6.00

B31a

CLKOUT falling edge to CS

valid—as requested by control bit

CST1 in the corresponding word in

UPM

7.58

14.33

6.25

13.00

5.00

11.75

3.80

10.54

B31b

CLKOUT rising edge to CS valid—as

requested by control bit CST2 in the

corresponding word in UPM

1.50

8.00

1.50

8.00

1.50

8.00

1.50

8.00

B31c

CLKOUT rising edge to CS valid—as

requested by control bit CST3 in the

corresponding word in UPM

7.58

14.33

6.25

13.00

5.00

11.75

3.80

10.04

Table 7. Bus Operation Timings (continued)

Num

Characteristic

33 MHz

40 MHz

50 MHz

66 MHz

Unit

Min

Max

Min

Max

Min

Max

Min

Max

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