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MC68HC08AB16AD bảng dữ liệu(PDF) 49 Page - Freescale Semiconductor, Inc |
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MC68HC08AB16AD bảng dữ liệu(HTML) 49 Page - Freescale Semiconductor, Inc |
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49 / 380 page ![]() MC68HC08AB16A — Rev. 2.1 Technical Data Freescale Semiconductor 49 $0028 Timer A Channel 0 Register Low (TACH0L) Read: Bit 7 654321 Bit 0 Write: Reset: Indeterminate after reset $0029 Timer A Channel 1 Status and Control Register (TASC1) Read: CH1F CH1IE 0 MS1A ELS1B ELS1A TOV1 CH1MAX Write: 0 Reset: 00000000 $002A Timer A Channel 1 Register High (TACH1H) Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: Indeterminate after reset $002B Timer A Channel 1 Register Low (TACH1L) Read: Bit 7 654321 Bit 0 Write: Reset: Indeterminate after reset $002C Timer A Channel 2 Status and Control Register (TASC2) Read: CH2F CH2IE MS2B MS2A ELS2B ELS2A TOV2 CH2MAX Write: 0 Reset: 00000000 $002D Timer A Channel 2 Register High (TACH2H) Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: Indeterminate after reset $002E Timer A Channel 2 Register Low (TACH2L) Read: Bit 7 654321 Bit 0 Write: Reset: Indeterminate after reset $002F Timer A Channel 3 Status and Control Register (TASC3) Read: CH3F CH3IE 0 MS3A ELS3B ELS3A TOV3 CH3MAX Write: 0 Reset: 00000000 $0030 Timer A Channel 3 Register High (TACH3H) Read: Bit 15 14 13 12 11 10 9 Bit 8 Write: Reset: Indeterminate after reset $0031 Timer A Channel 3 Register Low (TACH3L) Read: Bit 7 654321 Bit 0 Write: Reset: Indeterminate after reset Addr. Register Name Bit 7 654321 Bit 0 = Unimplemented R = Reserved Figure 2-2. Control, Status, and Data Registers (Sheet 5 of 11) |
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