PLC18V8Z datasheet(6/23 Pages) PHILIPS

6 / 23 page

Philips Semiconductors

Product specification

PLC18V8Z

Zero standby power

CMOS versatile PAL devices

1997 Aug 08

OUTPUT MACRO CELL (OMC)

MUX

CLK

OUT

MUX

VCC

OUTPUT

POLARITY

CONTROL

FROM

AND

ARRAY

X(n)

DIRECTION CONTROL TERM

TO ALL OMCs

{

AC1n

AC2n

NOTE:

Denotes a programmable cell location.

FROM AND

ARRAY

SP00014

THE OUTPUT MACRO CELL (OMC)

The PLC18V8Z series devices have 8 individually programmable

Output Macro Cells. The 72 AND inputs (or product terms) from the

programmable AND array are connected to the 8 OMCs in groups of

9. Eight of the AND terms are dedicated to logic functions; the ninth

is for asynchronous direction control, which enables/disables the

respective bidirectional I/O pin. Two product terms are dedicated for

the Synchronous Preset and Asynchronous Reset functions.

Each OMC can be independently programmed via 16 architecture

control bits, AC1n and AC2n (one pair per macro cell). Similarly,

each OMC has a programmable output polarity control bit (Xn). By

configuring the pair of architecture control bits according to the

configuration cell table, 4 different configurations may be

implemented. Note that the configuration cell is automatically

programmed based on the OMC configuration.

DESIGN SECURITY

The PLC18V8Z series devices have a programmable security fuse

that controls the access to the data programmed in the device. By

using this programmable feature, proprietary designs implemented

in the device cannot be copied or retrieved.

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