DSP56374UMSLASHD datasheet(35/64 Pages) FREESCALE

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Serial Host Interface SPI Protocol Timing

DSP56374 Data Sheet, Rev. 4.2

Freescale Semiconductor

Serial Host Interface SPI Protocol Timing

Table 21. Serial Host Interface SPI Protocol Timing

No.

Characteristics1,3,4

Mode

Filter Mode

Expression

Min

Max

Unit

Minimum serial clock cycle = tSPICC(min)

Master/Slave

Bypassed

10.0 x TC + 9

76.0

—

Very Narrow

10.0 x TC + 9

76.0

—

Narrow

10.0 x TC + 133

200.0

—

Wide

10.0 x TC + 333

400.0

—

Tolerable Spike width on data or clock in.

—

Bypassed

—

Very Narrow

—

Narrow

—

Wide

—

100

Serial clock high period

Master

Bypassed

—

38.0

—

Very Narrow

—

38.0

—

Narrow

—

100.0

—

Wide

—

200.0

—

Slave

Bypassed

2.0 x TC + 19.6

33.0

—

Very Narrow

2.0 x TC + 19.6

33.0

—

Narrow

2.0 x TC + 86.6

100.0

—

Wide

2.0 x TC + 186.6 200.0

—

Serial clock low period

Master

Bypassed

—

38.0

—

Very Narrow

—

38.0

—

Narrow

—

100.0

—

Wide

—

200.0

—

Slave

Bypassed

2.0 x TC + 19.6

33.0

—

Very Narrow

2.0 x TC + 19.6

33.0

—

Narrow

2.0 x TC + 86.6

100.0

—

Wide

2.0 x TC + 186.6 200.0

—

Serial clock rise/fall time

Master

Slave

—

——

—

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